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Searched refs:PTR (Results 1 – 25 of 111) sorted by relevance

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/external/llvm/test/MC/X86/
Dintel-syntax-x86-64-avx512f_vl.s17 vcmppd k3,xmm27,XMMWORD PTR [rcx],0x7b
21 vcmppd k3,xmm27,XMMWORD PTR [rax+r14*8+0x123],0x7b
25 vcmppd k3,xmm27,QWORD PTR [rcx]{1to2},0x7b
29 vcmppd k3,xmm27,XMMWORD PTR [rdx+0x7f0],0x7b
33 vcmppd k3,xmm27,XMMWORD PTR [rdx+0x800],0x7b
37 vcmppd k3,xmm27,XMMWORD PTR [rdx-0x800],0x7b
41 vcmppd k3,xmm27,XMMWORD PTR [rdx-0x810],0x7b
45 vcmppd k3,xmm27,QWORD PTR [rdx+0x3f8]{1to2},0x7b
49 vcmppd k3,xmm27,QWORD PTR [rdx+0x400]{1to2},0x7b
53 vcmppd k3,xmm27,QWORD PTR [rdx-0x400]{1to2},0x7b
[all …]
Dintel-syntax-avx512.s57 vcmppd k2,zmm12,zmmword PTR [rcx],0x7b
61 vcmppd k2 ,zmm12,zmmword PTR [rax+r14*8+0x123],0x7b
65 vcmppd k2,zmm12,QWORD PTR [rcx]{1to8},0x7b
69 vcmppd k2,zmm12,zmmword PTR [rdx+0x1fc0],0x7b
73 vcmppd k2,zmm12,zmmword PTR [rdx+0x2000],0x7b
77 vcmppd k2,zmm12,zmmword PTR [rdx-0x2000],0x7b
81 vcmppd k2,zmm12,zmmword PTR [rdx-0x2040],0x7b
85 vcmppd k2,zmm12,QWORD PTR [rdx+0x3f8]{1to8},0x7b
89 vcmppd k2,zmm12,QWORD PTR [rdx+0x400]{1to8},0x7b
93 vcmppd k2,zmm12,QWORD PTR [rdx-0x400]{1to8},0x7b
[all …]
Dintel-syntax.s9 mov DWORD PTR [RSP - 4], 257
11 mov DWORD PTR [RSP + 4], 258
13 mov QWORD PTR [RSP - 16], 123
15 mov BYTE PTR [RSP - 17], 97
17 mov EAX, DWORD PTR [RSP - 4]
19 mov RAX, QWORD PTR [RSP]
21 mov DWORD PTR [RSP - 4], -4
23 mov RCX, QWORD PTR [0]
25 mov EAX, DWORD PTR [RSP + 4*RAX - 24]
27 mov BYTE PTR [RDX + RCX], DIL
[all …]
/external/llvm/test/CodeGen/Mips/
Dload-store-left-right.ll34 ; MIPS32R6: lw $[[PTR:[0-9]+]], %got(si)(
35 ; MIPS32R6: lw $2, 0($[[PTR]])
43 ; MIPS64R6: ld $[[PTR:[0-9]+]], %got_disp(si)(
44 ; MIPS64R6: lw $2, 0($[[PTR]])
60 ; MIPS32R6: lw $[[PTR:[0-9]+]], %got(si)(
61 ; MIPS32R6: sw $4, 0($[[PTR]])
69 ; MIPS64R6: ld $[[PTR:[0-9]+]], %got_disp(si)(
70 ; MIPS64R6: sw $4, 0($[[PTR]])
90 ; MIPS32R6: lw $[[PTR:[0-9]+]], %got(sll)(
91 ; MIPS32R6-DAG: lw $2, 0($[[PTR]])
[all …]
/external/clang/include/clang/AST/
DEvaluatedExprVisitor.h35 #define PTR(CLASS) typename Ptr<CLASS>::type macro
41 void VisitDeclRefExpr(PTR(DeclRefExpr) E) { } in VisitDeclRefExpr()
42 void VisitOffsetOfExpr(PTR(OffsetOfExpr) E) { } in VisitOffsetOfExpr()
43 void VisitUnaryExprOrTypeTraitExpr(PTR(UnaryExprOrTypeTraitExpr) E) { } in VisitUnaryExprOrTypeTraitExpr()
44 void VisitExpressionTraitExpr(PTR(ExpressionTraitExpr) E) { } in VisitExpressionTraitExpr()
45 void VisitBlockExpr(PTR(BlockExpr) E) { } in VisitBlockExpr()
46 void VisitCXXUuidofExpr(PTR(CXXUuidofExpr) E) { } in VisitCXXUuidofExpr()
47 void VisitCXXNoexceptExpr(PTR(CXXNoexceptExpr) E) { } in VisitCXXNoexceptExpr()
49 void VisitMemberExpr(PTR(MemberExpr) E) { in VisitMemberExpr()
54 void VisitChooseExpr(PTR(ChooseExpr) E) { in VisitChooseExpr()
[all …]
DStmtVisitor.h36 #define PTR(CLASS) typename Ptr<CLASS>::type macro
38 return static_cast<ImplClass*>(this)->Visit ## NAME(static_cast<PTR(CLASS)>(S))
40 RetTy Visit(PTR(Stmt) S) { in Visit()
45 if (PTR(BinaryOperator) BinOp = dyn_cast<BinaryOperator>(S)) { in Visit()
82 } else if (PTR(UnaryOperator) UnOp = dyn_cast<UnaryOperator>(S)) { in Visit()
114 RetTy Visit ## CLASS(PTR(CLASS) S) { DISPATCH(PARENT, PARENT); }
120 RetTy VisitBin ## NAME(PTR(BinaryOperator) S) { \
140 RetTy VisitBin ## NAME(PTR(CompoundAssignOperator) S) { \ in BINOP_FALLBACK()
152 RetTy VisitUnary ## NAME(PTR(UnaryOperator) S) { \
166 RetTy VisitStmt(PTR(Stmt) Node) { return RetTy(); }
[all …]
DCommentVisitor.h25 #define PTR(CLASS) typename Ptr<CLASS>::type macro
27 return static_cast<ImplClass*>(this)->visit ## NAME(static_cast<PTR(CLASS)>(C))
29 RetTy visit(PTR(Comment) C) { in visit()
48 RetTy visit ## CLASS(PTR(CLASS) C) { DISPATCH(PARENT, PARENT); }
53 RetTy visitComment(PTR(Comment) C) { return RetTy(); } in visitComment()
55 #undef PTR
DDeclVisitor.h34 #define PTR(CLASS) typename Ptr<CLASS>::type macro
36 return static_cast<ImplClass*>(this)->Visit##NAME(static_cast<PTR(CLASS)>(D))
38 RetTy Visit(PTR(Decl) D) { in Visit()
51 RetTy Visit##DERIVED##Decl(PTR(DERIVED##Decl) D) { DISPATCH(BASE, BASE); }
54 RetTy VisitDecl(PTR(Decl) D) { return RetTy(); } in VisitDecl()
56 #undef PTR
/external/libvpx/libvpx/vp8/common/x86/
Dcopy_sse2.asm39 movdqu xmm0, XMMWORD PTR [rsi]
40 movdqu xmm1, XMMWORD PTR [rsi + 16]
41 movdqu xmm2, XMMWORD PTR [rsi + rax]
42 movdqu xmm3, XMMWORD PTR [rsi + rax + 16]
46 movdqu xmm4, XMMWORD PTR [rsi]
47 movdqu xmm5, XMMWORD PTR [rsi + 16]
48 movdqu xmm6, XMMWORD PTR [rsi + rax]
49 movdqu xmm7, XMMWORD PTR [rsi + rax + 16]
53 movdqa XMMWORD PTR [rdi], xmm0
54 movdqa XMMWORD PTR [rdi + 16], xmm1
[all …]
Dsubpixel_ssse3.asm48 movsxd rdx, DWORD PTR arg(5) ;table index
58 cmp esi, DWORD PTR [rax]
61 movdqa xmm4, XMMWORD PTR [rax] ;k0_k5
62 movdqa xmm5, XMMWORD PTR [rax+256] ;k2_k4
63 movdqa xmm6, XMMWORD PTR [rax+128] ;k1_k3
74 movq xmm0, MMWORD PTR [rsi - 2] ; -2 -1 0 1 2 3 4 5
76 movq xmm2, MMWORD PTR [rsi + 3] ; 3 4 5 6 7 8 9 10
117 movdqa xmm5, XMMWORD PTR [rax+256] ;k2_k4
118 movdqa xmm6, XMMWORD PTR [rax+128] ;k1_k3
120 movdqa xmm3, XMMWORD PTR [GLOBAL(shuf2bfrom1)]
[all …]
Dcopy_sse3.asm101 movdqu xmm0, XMMWORD PTR [src_ptr]
102 movdqu xmm1, XMMWORD PTR [src_ptr + 16]
103 movdqu xmm2, XMMWORD PTR [src_ptr + src_stride]
104 movdqu xmm3, XMMWORD PTR [src_ptr + src_stride + 16]
105 movdqu xmm4, XMMWORD PTR [end_ptr]
106 movdqu xmm5, XMMWORD PTR [end_ptr + 16]
107 movdqu xmm6, XMMWORD PTR [end_ptr + src_stride]
108 movdqu xmm7, XMMWORD PTR [end_ptr + src_stride + 16]
114 movdqa XMMWORD PTR [ref_ptr], xmm0
115 movdqa XMMWORD PTR [ref_ptr + 16], xmm1
[all …]
Dsubpixel_sse2.asm60 movq xmm3, MMWORD PTR [rsi - 2]
61 movq xmm1, MMWORD PTR [rsi + 6]
77 pmullw xmm3, XMMWORD PTR [rdx] ; x[-2] * H[-2]; Tap 1
81 pmullw xmm4, XMMWORD PTR [rdx+16] ; x[-1] * H[-1]; Tap 2
181 movq xmm3, MMWORD PTR [rsi - 2]
182 movq xmm1, MMWORD PTR [rsi + 6]
184 movq xmm2, MMWORD PTR [rsi +14]
202 pmullw xmm3, XMMWORD PTR [rdx] ; x[-2] * H[-2]; Tap 1
206 pmullw xmm4, XMMWORD PTR [rdx+16] ; x[-1] * H[-1]; Tap 2
255 pmullw xmm3, XMMWORD PTR [rdx] ; x[-2] * H[-2]; Tap 1
[all …]
/external/libvpx/libvpx/vpx_dsp/x86/
Dsad_sse3.asm84 movdqa xmm0, XMMWORD PTR [%2]
85 lddqu xmm5, XMMWORD PTR [%3]
86 lddqu xmm6, XMMWORD PTR [%3+1]
87 lddqu xmm7, XMMWORD PTR [%3+2]
93 movdqa xmm0, XMMWORD PTR [%2]
94 lddqu xmm1, XMMWORD PTR [%3]
95 lddqu xmm2, XMMWORD PTR [%3+1]
96 lddqu xmm3, XMMWORD PTR [%3+2]
106 movdqa xmm0, XMMWORD PTR [%2+%4]
107 lddqu xmm1, XMMWORD PTR [%3+%5]
[all …]
Dsad_sse4.asm16 movdqa xmm0, XMMWORD PTR [rsi]
17 movq xmm1, MMWORD PTR [rdi]
18 movq xmm3, MMWORD PTR [rdi+8]
19 movq xmm2, MMWORD PTR [rdi+16]
37 movdqa xmm0, XMMWORD PTR [rsi]
38 movq xmm5, MMWORD PTR [rdi]
39 movq xmm3, MMWORD PTR [rdi+8]
40 movq xmm2, MMWORD PTR [rdi+16]
60 movdqa xmm0, XMMWORD PTR [rsi + rax]
61 movq xmm5, MMWORD PTR [rdi+ rdx]
[all …]
Dhighbd_variance_impl_sse2.asm37 movsxd rax, DWORD PTR arg(1) ;[source_stride]
38 movsxd rdx, DWORD PTR arg(3) ;[recon_stride]
70 movdqu xmm1, XMMWORD PTR [rsi]
71 movdqu xmm2, XMMWORD PTR [rdi]
87 movdqu xmm3, XMMWORD PTR [rsi+16]
90 movdqu xmm2, XMMWORD PTR [rdi+16]
94 movdqu xmm1, XMMWORD PTR [rsi+rax]
97 movdqu xmm2, XMMWORD PTR [rdi+rdx]
101 movdqu xmm3, XMMWORD PTR [rsi+rax+16]
104 movdqu xmm2, XMMWORD PTR [rdi+rdx+16]
[all …]
Dsad_ssse3.asm16 movdqa xmm0, XMMWORD PTR [rsi]
17 lddqu xmm5, XMMWORD PTR [rdi]
18 lddqu xmm6, XMMWORD PTR [rdi+1]
19 lddqu xmm7, XMMWORD PTR [rdi+2]
25 movdqa xmm0, XMMWORD PTR [rsi]
26 lddqu xmm1, XMMWORD PTR [rdi]
27 lddqu xmm2, XMMWORD PTR [rdi+1]
28 lddqu xmm3, XMMWORD PTR [rdi+2]
38 movdqa xmm0, XMMWORD PTR [rsi+rax]
39 lddqu xmm1, XMMWORD PTR [rdi+rdx]
[all …]
Dvpx_high_subpixel_8t_sse2.asm48 movsxd rcx, DWORD PTR arg(6) ;bps
124 movsxd rcx, DWORD PTR arg(6) ;bps
235 movsxd rax, DWORD PTR arg(1) ;pixels_per_line
236 movsxd rbx, DWORD PTR arg(3) ;out_pitch
240 movsxd rcx, DWORD PTR arg(4) ;output_height
303 movsxd rax, DWORD PTR arg(1) ;pixels_per_line
304 movsxd rbx, DWORD PTR arg(3) ;out_pitch
308 movsxd rcx, DWORD PTR arg(4) ;output_height
362 movsxd rax, DWORD PTR arg(1) ;pixels_per_line
363 movsxd rbx, DWORD PTR arg(3) ;out_pitch
[all …]
Dvpx_subpixel_8t_sse2.asm213 movsxd rax, DWORD PTR arg(1) ;pixels_per_line
214 movsxd rbx, DWORD PTR arg(3) ;out_pitch
216 movsxd rcx, DWORD PTR arg(4) ;output_height
281 movsxd rax, DWORD PTR arg(1) ;pixels_per_line
282 movsxd rbx, DWORD PTR arg(3) ;out_pitch
284 movsxd rcx, DWORD PTR arg(4) ;output_height
340 movsxd rax, DWORD PTR arg(1) ;pixels_per_line
341 movsxd rbx, DWORD PTR arg(3) ;out_pitch
343 movsxd rcx, DWORD PTR arg(4) ;output_height
393 movsxd rax, DWORD PTR arg(1) ;pixels_per_line
[all …]
/external/libvpx/libvpx/vp8/encoder/x86/
Ddct_sse2.asm69 movq xmm0, MMWORD PTR[input ] ;03 02 01 00
70 movq xmm2, MMWORD PTR[input+ pitch] ;13 12 11 10
72 movq xmm1, MMWORD PTR[input ] ;23 22 21 20
73 movq xmm3, MMWORD PTR[input+ pitch] ;33 32 31 30
94 pmaddwd xmm0, XMMWORD PTR[GLOBAL(_mult_add)] ;a1 + b1
95 pmaddwd xmm1, XMMWORD PTR[GLOBAL(_mult_sub)] ;a1 - b1
97 pmaddwd xmm3, XMMWORD PTR[GLOBAL(_5352_2217)] ;c1*2217 + d1*5352
98 pmaddwd xmm4, XMMWORD PTR[GLOBAL(_2217_neg5352)];d1*2217 - c1*5352
100 paddd xmm3, XMMWORD PTR[GLOBAL(_14500)]
101 paddd xmm4, XMMWORD PTR[GLOBAL(_7500)]
[all …]
Ddct_mmx.asm94 pmaddwd mm1, MMWORD PTR[GLOBAL (_5352_2217)] ; c1*2217 + d1*5352
95 pmaddwd mm4, MMWORD PTR[GLOBAL (_5352_2217)] ; c1*2217 + d1*5352
97 pmaddwd mm3, MMWORD PTR[GLOBAL(_2217_neg5352)] ; d1*2217 - c1*5352
98 pmaddwd mm5, MMWORD PTR[GLOBAL(_2217_neg5352)] ; d1*2217 - c1*5352
100 paddd mm1, MMWORD PTR[GLOBAL(_14500)]
101 paddd mm4, MMWORD PTR[GLOBAL(_14500)]
102 paddd mm3, MMWORD PTR[GLOBAL(_7500)]
103 paddd mm5, MMWORD PTR[GLOBAL(_7500)]
152 pandn mm6, MMWORD PTR[GLOBAL(_cmp_mask)] ; clear upper,
161 paddw mm0, MMWORD PTR[GLOBAL(_7w)]
[all …]
/external/llvm/test/CodeGen/Mips/cconv/
Dreturn-struct.ll129 ; N64-LE-DAG: ld [[PTR:\$[0-9]+]], %got_disp(struct_3xi16)($1)
130 ; N64-LE-DAG: lh [[R1:\$[0-9]+]], 4([[PTR]])
131 ; N64-LE-DAG: lwu [[R2:\$[0-9]+]], 0([[PTR]])
135 ; N64-BE-DAG: ld [[PTR:\$[0-9]+]], %got_disp(struct_3xi16)($1)
136 ; N64-BE-DAG: lw [[R1:\$[0-9]+]], 0([[PTR]])
138 ; N64-BE-DAG: lhu [[R3:\$[0-9]+]], 4([[PTR]])
154 ; O32-DAG: lui [[PTR:\$[0-9]+]], %hi(struct_128xi16)
155 ; O32-DAG: addiu $5, [[PTR]], %lo(struct_128xi16)
160 ; N32-DAG: addiu [[PTR:\$[0-9]+]], [[PTR_HI]], %lo(struct_128xi16)
163 ; N32-DAG: sll $5, [[PTR]], 0
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Dshl_add_ptr.ll19 ; SI: v_lshlrev_b32_e32 [[PTR:v[0-9]+]], 2, {{v[0-9]+}}
20 ; SI: ds_read_b32 {{v[0-9]+}}, [[PTR]] offset:8
36 ; SI: v_lshlrev_b32_e32 [[PTR:v[0-9]+]], 2, {{v[0-9]+}}
37 ; SI: ds_read_b32 [[RESULT:v[0-9]+]], [[PTR]] offset:8
72 ; SI: v_lshlrev_b32_e32 [[PTR:v[0-9]+]], 2, {{v[0-9]+}}
74 ; SI-NEXT: ds_read2st64_b32 {{v\[[0-9]+:[0-9]+\]}}, [[PTR]] offset0:1 offset1:9
89 ; SI: v_lshlrev_b32_e32 [[PTR:v[0-9]+]], 2, {{v[0-9]+}}
90 ; SI: ds_write_b32 [[PTR]], {{v[0-9]+}} offset:8
119 ; SI: v_lshlrev_b32_e32 [[PTR:v[0-9]+]], 2, {{v[0-9]+}}
120 ; SI: ds_cmpst_rtn_b32 {{v[0-9]+}}, [[PTR]], {{v[0-9]+}}, {{v[0-9]+}} offset:8
[all …]
Datomic_cmp_swap_local.ll7 ; SICI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
9 ; VI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
11 ; GCN-DAG: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[PTR]]
26 ; SICI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb
28 ; VI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c
30 ; GCN-DAG: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[PTR]]
59 ; SICI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x9
61 ; VI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x24
64 ; GCN-DAG: v_mov_b32_e32 [[VPTR:v[0-9]+]], [[PTR]]
76 ; SICI: s_load_dword [[PTR:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x9
[all …]
/external/llvm/test/CodeGen/X86/
Dvector-merge-store-fp-constants.ll7 ; DEFAULTCPU-DAG: movq $0, ([[PTR:%[a-z]+]])
8 ; DEFAULTCPU-DAG: movq $0, 8([[PTR]])
9 ; DEFAULTCPU-DAG: movq $0, 16([[PTR]])
10 ; DEFAULTCPU-DAG: movq $0, 24([[PTR]])
13 ; X8664CPU-DAG: movups [[ZEROREG]], ([[PTR:%[a-z]+]])
14 ; X8664CPU-DAG: movups [[ZEROREG]], 16([[PTR:%[a-z]+]])
/external/clang/test/CodeGenObjC/
Dterminate.m14 // CHECK-WITH: [[PTR:%.*]] = alloca i8*,
15 // CHECK-WITH: call void @destroy(i8** [[PTR]])
17 // CHECK-WITH: invoke void @destroy(i8** [[PTR]])
24 // CHECK-WITHOUT: [[PTR:%.*]] = alloca i8*,
25 // CHECK-WITHOUT: call void @destroy(i8** [[PTR]])
27 // CHECK-WITHOUT: invoke void @destroy(i8** [[PTR]])

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