Searched refs:PrefReg (Results 1 – 4 of 4) sorted by relevance
599 void setRegAllocationHint(unsigned VReg, unsigned Type, unsigned PrefReg) { in setRegAllocationHint() argument602 RegAllocHints[VReg].second = PrefReg; in setRegAllocationHint()607 void setSimpleHint(unsigned VReg, unsigned PrefReg) { in setSimpleHint() argument608 setRegAllocationHint(VReg, /*Type=*/0, PrefReg); in setSimpleHint()
79 PrefReg, ///< Block entry/exit prefers a register. enumerator
134 case PrefReg: in addBias()
945 BC.Entry = BI.LiveIn ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()946 BC.Exit = BI.LiveOut ? SpillPlacement::PrefReg : SpillPlacement::DontCare; in addSplitConstraints()1165 Ins += RegIn != (BC.Entry == SpillPlacement::PrefReg); in calcGlobalSplitCost()1167 Ins += RegOut != (BC.Exit == SpillPlacement::PrefReg); in calcGlobalSplitCost()