| /external/llvm/test/CodeGen/AMDGPU/ |
| D | unsupported-cc.ll | 30 ; CHECK: SETGE * T{{[0-9]}}.[[CHAN:[XYZW]]], KC0[2].Z, literal.x
44 ; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, {{literal\.[xy]}}
117 ; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, {{literal\.[xy]}}, KC0[2].Z
|
| D | llvm.round.ll | 20 ; R600-DAG: SETGE
|
| D | setcc.ll | 143 ; R600: SETGE
170 ; R600: SETGE
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 863 SETGE, // 1 X 0 1 1 True if greater than or equal enumerator
875 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDGPUISelLowering.cpp | 236 ISD::SETGE); in LowerUDIVREM()
242 ISD::SETGE); in LowerUDIVREM()
|
| D | AMDGPUInstructions.td | 60 case ISD::SETGE: return true;}}}]
|
| D | R600Instructions.td | 286 0xA, "SETGE",
423 (selectcc (i32 R600_Reg32:$src0), R600_Reg32:$src1, -1, 0, SETGE))]
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrInteger.td | 49 defm GE_S : ComparisonInt<SETGE, "ge_s">;
|
| /external/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 192 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE; in getFCmpCodeWithoutNaN()
206 case ICmpInst::ICMP_SGE: return ISD::SETGE; in getICmpCondCode()
|
| D | TargetLoweringBase.cpp | 704 CCs[RTLIB::OGE_F32] = ISD::SETGE; in InitCmpLibcallCCs()
705 CCs[RTLIB::OGE_F64] = ISD::SETGE; in InitCmpLibcallCCs()
706 CCs[RTLIB::OGE_F128] = ISD::SETGE; in InitCmpLibcallCCs()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSelectCCInfo.td | 63 IntRegs:$fval, SETGE)),
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrCMovSetCC.td | 109 defm SETGE : SETCC<0x9D, "setge", X86_COND_GE>; // signed greater or equal
|
| D | X86IntrinsicsInfo.h | 1681 X86_INTRINSIC_DATA(sse2_comige_sd, COMI, X86ISD::COMI, ISD::SETGE),
1724 X86_INTRINSIC_DATA(sse2_ucomige_sd, COMI, X86ISD::UCOMI, ISD::SETGE),
1753 X86_INTRINSIC_DATA(sse_comige_ss, COMI, X86ISD::COMI, ISD::SETGE),
1764 X86_INTRINSIC_DATA(sse_ucomige_ss, COMI, X86ISD::UCOMI, ISD::SETGE),
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 86 [{return N->get() == ISD::SETOGE || N->get() == ISD::SETGE;}]
126 def COND_SGE : PatLeaf <(cond), [{return N->get() == ISD::SETGE;}]>;
|
| D | R600Instructions.td | 706 0xA, "SETGE",
801 [(set i32:$dst, (selectcc i32:$src0, i32:$src1, -1, 0, SETGE))]
1667 def : CND_INT_f32 <CNDGE_INT, SETGE>;
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrQPX.td | 1027 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETGE),
1074 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETGE),
1127 def : Pat<(v4f64 (selectcc i1:$lhs, i1:$rhs, v4f64:$tval, v4f64:$fval, SETGE)),
1148 def : Pat<(v4f32 (selectcc i1:$lhs, i1:$rhs, v4f32:$tval, v4f32:$fval, SETGE)),
1169 def : Pat<(v4i1 (selectcc i1:$lhs, i1:$rhs, v4i1:$tval, v4i1:$fval, SETGE)),
|
| D | PPCInstrInfo.td | 2899 def : Pat<(i1 (setcc i1:$s1, i1:$s2, SETGE)),
3007 defm : ExtSetCCPat<SETGE,
3039 defm : ExtSetCCPat<SETGE,
3094 defm : CRNotPat<(i1 (setcc i32:$s1, imm32SExt16:$imm, SETGE)),
3122 defm : CRNotPat<(i1 (setcc i32:$s1, i32:$s2, SETGE)),
3162 defm : CRNotPat<(i1 (setcc i64:$s1, imm64SExt16:$imm, SETGE)),
3190 defm : CRNotPat<(i1 (setcc i64:$s1, i64:$s2, SETGE)),
3217 defm : CRNotPat<(i1 (setcc f32:$s1, f32:$s2, SETGE)),
3248 defm : CRNotPat<(i1 (setcc f64:$s1, f64:$s2, SETGE)),
3284 def : Pat <(i1 (selectcc i1:$lhs, i1:$rhs, i1:$tval, i1:$fval, SETGE)),
[all …]
|
| D | PPCISelDAGToDAG.cpp | 2111 case ISD::SETGE: return PPC::PRED_GE; in getPredicateForSetCC()
2135 case ISD::SETGE: Invert = true; return 0; // !Bit #0 = SETUGE in getCRIdxForSetCC()
2163 case ISD::SETLE: CC = ISD::SETGE; Swap = true; break; in getVCmpInst()
2195 case ISD::SETGE: in getVCmpInst()
2209 case ISD::SETGE: CC = ISD::SETLE; Swap = true; break; in getVCmpInst()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 144 case ISD::SETGE: in softenSetCCOperands()
1467 case ISD::SETGE: in SimplifySetCC()
1631 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { in SimplifySetCC()
1635 ISD::CondCode NewCC = (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT; in SimplifySetCC()
1663 if ((Cond == ISD::SETGE || Cond == ISD::SETUGE) && C1 == MinVal) in SimplifySetCC()
2066 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> ~X | Y in SimplifySetCC()
|
| D | LegalizeIntegerTypes.cpp | 975 case ISD::SETGE: in PromoteSetCCOperands()
2190 SDValue LHSSign = DAG.getSetCC(dl, OType, LHS, Zero, ISD::SETGE); in ExpandIntRes_SADDSUBO()
2191 SDValue RHSSign = DAG.getSetCC(dl, OType, RHS, Zero, ISD::SETGE); in ExpandIntRes_SADDSUBO()
2196 SDValue SumSign = DAG.getSetCC(dl, OType, Sum, Zero, ISD::SETGE); in ExpandIntRes_SADDSUBO()
2748 case ISD::SETGE: in IntegerExpandSetCCOperands()
2781 (CCCode == ISD::SETLE || CCCode == ISD::SETGE || in IntegerExpandSetCCOperands()
2813 case ISD::SETLE: CCCode = ISD::SETGE; FlipOperands = true; break; in IntegerExpandSetCCOperands()
|
| D | SelectionDAGDumper.cpp | 348 case ISD::SETGE: return "setge"; in getOperationName()
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 590 case ISD::SETGE: in EmitInstrWithCustomInserter()
|
| D | BPFInstrInfo.td | 73 [{return (N->getZExtValue() == ISD::SETGE);}]>;
|
| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 585 def SETEQ : CondCode; def SETGT : CondCode; def SETGE : CondCode;
981 (setcc node:$lhs, node:$rhs, SETGE)>;
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsDSPInstrInfo.td | 1393 def : DSPSetCCPatInv<PseudoCMP_LT_PH, PseudoPICK_PH, v2i16, SETGE>;
1406 def : DSPSelectCCPatInv<PseudoCMP_LT_PH, PseudoPICK_PH, v2i16, SETGE>;
|