Searched refs:SMULO (Results 1 – 12 of 12) sorted by relevance
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 238 SMULO, UMULO, enumerator
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 231 case ISD::SMULO: return "smulo"; in getOperationName()
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| D | LegalizeIntegerTypes.cpp | 131 case ISD::SMULO: in PromoteIntegerResult()
767 if (N->getOpcode() == ISD::SMULO) { in PromoteIntRes_XMULO()
1392 case ISD::SMULO: ExpandIntRes_XMULO(N, Lo, Hi); break; in ExpandIntegerResult()
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| D | LegalizeDAG.cpp | 3595 case ISD::SMULO: { in ExpandNode()
3605 bool isSigned = Node->getOpcode() == ISD::SMULO; in ExpandNode()
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| D | SelectionDAG.cpp | 2154 case ISD::SMULO: in computeKnownBits()
2615 case ISD::SMULO: in ComputeNumSignBits()
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| D | SelectionDAGBuilder.cpp | 5086 case Intrinsic::smul_with_overflow: Op = ISD::SMULO; break; in visitIntrinsicCall()
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| D | DAGCombiner.cpp | 1376 case ISD::SMULO: return visitSMULO(N); in visit()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1660 setOperationAction(ISD::SMULO, MVT::i64, Custom); in SparcTargetLowering()
2866 assert((opcode == ISD::UMULO || opcode == ISD::SMULO) && "Invalid Opcode."); in LowerUMULO_SMULO()
2868 bool isSigned = (opcode == ISD::SMULO); in LowerUMULO_SMULO()
2972 case ISD::SMULO: return LowerUMULO_SMULO(Op, DAG, *this); in LowerOperation()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 260 setOperationAction(ISD::SMULO, MVT::i32, Custom); in AArch64TargetLowering()
261 setOperationAction(ISD::SMULO, MVT::i64, Custom); in AArch64TargetLowering()
1573 case ISD::SMULO: in getAArch64XALUOOp()
1576 bool IsSigned = Op.getOpcode() == ISD::SMULO; in getAArch64XALUOOp()
2276 case ISD::SMULO: in LowerOperation()
3604 Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO)) { in LowerBR_CC()
4053 Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO)) { in LowerSELECT()
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| /external/llvm/test/CodeGen/X86/ |
| D | xaluo.ll | 294 ; SMULO
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 803 setOperationAction(ISD::SMULO, VT, Expand); in initActions()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 1761 setOperationAction(ISD::SMULO, VT, Custom); in X86TargetLowering()
14992 ((CondOpcode == ISD::UMULO || CondOpcode == ISD::SMULO) && in LowerSELECT()
15005 case ISD::SMULO: X86Opcode = X86ISD::SMUL; X86Cond = X86::COND_O; break; in LowerSELECT()
15474 Cond.getOperand(0).getOpcode() == ISD::SMULO || in LowerBRCOND()
15528 ((CondOpcode == ISD::UMULO || CondOpcode == ISD::SMULO) && in LowerBRCOND()
15554 case ISD::SMULO: X86Opcode = X86ISD::SMUL; X86Cond = X86::COND_O; break; in LowerBRCOND()
19094 case ISD::SMULO: in LowerXALUO()
20132 case ISD::SMULO: in LowerOperation()
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