Searched refs:ShOp (Results 1 – 7 of 7) sorted by relevance
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMAddressingModes.h | 112 static inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) { in getSORegOpc() argument 113 return ShOp | (Imm << 3); in getSORegOpc()
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D | ARMMCCodeEmitter.cpp | 1084 ARM_AM::ShiftOpc ShOp = ARM_AM::getAM2ShiftOpc(MO2.getImm()); in getLdStSORegOpValue() local 1085 unsigned SBits = getShiftOp(ShOp); in getLdStSORegOpValue() 1137 ARM_AM::ShiftOpc ShOp = ARM_AM::getAM2ShiftOpc(Imm); in getAddrMode2OffsetOpValue() local 1139 Binary |= getShiftOp(ShOp) << 5; // Shift type is bits [6:5] in getAddrMode2OffsetOpValue()
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/external/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 1775 CreateShiftExtend(AArch64_AM::ShiftExtendType ShOp, unsigned Val, in CreateShiftExtend() argument 1778 Op->ShiftExtend.Type = ShOp; in CreateShiftExtend() 2405 AArch64_AM::ShiftExtendType ShOp = in tryParseOptionalShiftExtend() local 2422 if (ShOp == AArch64_AM::InvalidShiftExtend) in tryParseOptionalShiftExtend() 2430 if (ShOp == AArch64_AM::LSL || ShOp == AArch64_AM::LSR || in tryParseOptionalShiftExtend() 2431 ShOp == AArch64_AM::ASR || ShOp == AArch64_AM::ROR || in tryParseOptionalShiftExtend() 2432 ShOp == AArch64_AM::MSL) { in tryParseOptionalShiftExtend() 2441 AArch64Operand::CreateShiftExtend(ShOp, 0, false, S, E, getContext())); in tryParseOptionalShiftExtend() 2468 ShOp, MCE->getValue(), true, S, E, getContext())); in tryParseOptionalShiftExtend()
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrNEON.td | 2572 ValueType Ty, SDNode ShOp> 2577 (Ty (ShOp (Ty DPR:$Vn), 2584 string OpcodeStr, string Dt, ValueType Ty, SDNode ShOp> 2589 (Ty (ShOp (Ty DPR:$Vn), 2620 ValueType ResTy, ValueType OpTy, SDNode ShOp> 2625 (ResTy (ShOp (ResTy QPR:$Vn), 2633 ValueType ResTy, ValueType OpTy, SDNode ShOp> 2638 (ResTy (ShOp (ResTy QPR:$Vn), 2780 ValueType Ty, SDPatternOperator MulOp, SDPatternOperator ShOp> 2787 (Ty (ShOp (Ty DPR:$src1), [all …]
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorTypes.cpp | 2372 SDValue ShOp = N->getOperand(1); in WidenVecRes_POWI() local 2373 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp, ShOp); in WidenVecRes_POWI() 2379 SDValue ShOp = N->getOperand(1); in WidenVecRes_Shift() local 2381 EVT ShVT = ShOp.getValueType(); in WidenVecRes_Shift() 2383 ShOp = GetWidenedVector(ShOp); in WidenVecRes_Shift() 2384 ShVT = ShOp.getValueType(); in WidenVecRes_Shift() 2390 ShOp = ModifyToType(ShOp, ShWidenVT); in WidenVecRes_Shift() 2392 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp, ShOp); in WidenVecRes_Shift()
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D | DAGCombiner.cpp | 2813 SDValue ShOp = N0->getOperand(1); in SimplifyBinOpWithSameOpcodeHands() local 2817 if (N->getOpcode() == ISD::XOR && ShOp.getOpcode() != ISD::UNDEF) { in SimplifyBinOpWithSameOpcodeHands() 2819 ShOp = DAG.getConstant(0, SDLoc(N), VT); in SimplifyBinOpWithSameOpcodeHands() 2821 ShOp = SDValue(); in SimplifyBinOpWithSameOpcodeHands() 2827 if (N0.getOperand(1) == N1.getOperand(1) && ShOp.getNode()) { in SimplifyBinOpWithSameOpcodeHands() 2831 return DAG.getVectorShuffle(VT, SDLoc(N), NewNode, ShOp, in SimplifyBinOpWithSameOpcodeHands() 2837 ShOp = N0->getOperand(0); in SimplifyBinOpWithSameOpcodeHands() 2838 if (N->getOpcode() == ISD::XOR && ShOp.getOpcode() != ISD::UNDEF) { in SimplifyBinOpWithSameOpcodeHands() 2840 ShOp = DAG.getConstant(0, SDLoc(N), VT); in SimplifyBinOpWithSameOpcodeHands() 2842 ShOp = SDValue(); in SimplifyBinOpWithSameOpcodeHands() [all …]
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/external/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 1576 ARM_AM::ShiftOpc ShOp = ARM_AM::lsl; in DecodeSORegMemOperand() local 1579 ShOp = ARM_AM::lsl; in DecodeSORegMemOperand() 1582 ShOp = ARM_AM::lsr; in DecodeSORegMemOperand() 1585 ShOp = ARM_AM::asr; in DecodeSORegMemOperand() 1588 ShOp = ARM_AM::ror; in DecodeSORegMemOperand() 1592 if (ShOp == ARM_AM::ror && imm == 0) in DecodeSORegMemOperand() 1593 ShOp = ARM_AM::rrx; in DecodeSORegMemOperand() 1601 shift = ARM_AM::getAM2Opc(ARM_AM::add, imm, ShOp); in DecodeSORegMemOperand() 1603 shift = ARM_AM::getAM2Opc(ARM_AM::sub, imm, ShOp); in DecodeSORegMemOperand()
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