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Searched refs:TGSI_OPCODE_IABS (Results 1 – 7 of 7) sorted by relevance

/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_info.c200 { 1, 1, 0, 0, 0, 0, COMP, "IABS", TGSI_OPCODE_IABS },
303 case TGSI_OPCODE_IABS: in tgsi_opcode_infer_src_type()
355 case TGSI_OPCODE_IABS: in tgsi_opcode_infer_dst_type()
Dtgsi_exec.c4213 case TGSI_OPCODE_IABS: in exec_instruction()
/external/mesa3d/src/gallium/include/pipe/
Dp_shader_tokens.h412 #define TGSI_OPCODE_IABS 159 macro
/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_setup_tgsi_llvm.c1055 bld_base->op_actions[TGSI_OPCODE_IABS].emit = build_tgsi_intrinsic_nomem; in radeon_llvm_context_init()
1056 bld_base->op_actions[TGSI_OPCODE_IABS].intr_name = "llvm.AMDIL.abs."; in radeon_llvm_context_init()
/external/mesa3d/src/gallium/drivers/nv50/codegen/
Dnv50_ir_from_tgsi.cpp387 case TGSI_OPCODE_IABS: in inferSrcType()
1797 case TGSI_OPCODE_IABS: in handleInstruction()
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_action.c1580 bld_base->op_actions[TGSI_OPCODE_IABS].emit = iabs_emit_cpu; in lp_set_default_actions_cpu()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_shader.c5408 {TGSI_OPCODE_IABS, 0, 0, tgsi_iabs},
5582 {TGSI_OPCODE_IABS, 0, 0, tgsi_iabs},
5756 {TGSI_OPCODE_IABS, 0, 0, tgsi_iabs},