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Searched refs:TGSI_OPCODE_ROUND (Results 1 – 12 of 12) sorted by relevance

/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_util.c201 case TGSI_OPCODE_ROUND: in tgsi_util_get_inst_usage_mask()
Dtgsi_info.c67 { 1, 1, 0, 0, 0, 0, COMP, "ROUND", TGSI_OPCODE_ROUND },
Dtgsi_exec.c3552 case TGSI_OPCODE_ROUND: in exec_instruction()
/external/mesa3d/src/gallium/include/pipe/
Dp_shader_tokens.h284 #define TGSI_OPCODE_ROUND 27 macro
/external/mesa3d/src/gallium/drivers/r300/
Dr300_tgsi_to_rc.c60 case TGSI_OPCODE_ROUND: return RC_OPCODE_ROUND; in translate_opcode()
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_tgsi_action.c106 LLVMValueRef tmp = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_ROUND, emit_data->args[0]); in arr_emit()
1599 bld_base->op_actions[TGSI_OPCODE_ROUND].emit = round_emit_cpu; in lp_set_default_actions_cpu()
Dlp_bld_tgsi_aos.c620 case TGSI_OPCODE_ROUND: in lp_emit_instruction_aos()
/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_setup_tgsi_llvm.c1086 bld_base->op_actions[TGSI_OPCODE_ROUND].emit = build_tgsi_intrinsic_nomem; in radeon_llvm_context_init()
1087 bld_base->op_actions[TGSI_OPCODE_ROUND].intr_name = "llvm.AMDIL.round.nearest."; in radeon_llvm_context_init()
/external/mesa3d/src/gallium/drivers/svga/
Dsvga_tgsi_insn.c2561 case TGSI_OPCODE_ROUND: in svga_emit_instruction()
3145 emit->info.opcode_count[TGSI_OPCODE_ROUND] >= 1 || in needs_to_create_zero()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_shader.c5269 {TGSI_OPCODE_ROUND, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE, tgsi_op2},
5443 {TGSI_OPCODE_ROUND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE, tgsi_op2},
5617 {TGSI_OPCODE_ROUND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE, tgsi_op2},
/external/mesa3d/src/gallium/drivers/nv50/codegen/
Dnv50_ir_from_tgsi.cpp1982 case TGSI_OPCODE_ROUND: in handleInstruction()
/external/mesa3d/src/mesa/state_tracker/
Dst_glsl_to_tgsi.cpp1824 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]); in visit()