Searched refs:TGSI_OPCODE_ROUND (Results 1 – 12 of 12) sorted by relevance
/external/mesa3d/src/gallium/auxiliary/tgsi/ |
D | tgsi_util.c | 201 case TGSI_OPCODE_ROUND: in tgsi_util_get_inst_usage_mask()
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D | tgsi_info.c | 67 { 1, 1, 0, 0, 0, 0, COMP, "ROUND", TGSI_OPCODE_ROUND },
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D | tgsi_exec.c | 3552 case TGSI_OPCODE_ROUND: in exec_instruction()
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/external/mesa3d/src/gallium/include/pipe/ |
D | p_shader_tokens.h | 284 #define TGSI_OPCODE_ROUND 27 macro
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/external/mesa3d/src/gallium/drivers/r300/ |
D | r300_tgsi_to_rc.c | 60 case TGSI_OPCODE_ROUND: return RC_OPCODE_ROUND; in translate_opcode()
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/external/mesa3d/src/gallium/auxiliary/gallivm/ |
D | lp_bld_tgsi_action.c | 106 LLVMValueRef tmp = lp_build_emit_llvm_unary(bld_base, TGSI_OPCODE_ROUND, emit_data->args[0]); in arr_emit() 1599 bld_base->op_actions[TGSI_OPCODE_ROUND].emit = round_emit_cpu; in lp_set_default_actions_cpu()
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D | lp_bld_tgsi_aos.c | 620 case TGSI_OPCODE_ROUND: in lp_emit_instruction_aos()
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | radeon_setup_tgsi_llvm.c | 1086 bld_base->op_actions[TGSI_OPCODE_ROUND].emit = build_tgsi_intrinsic_nomem; in radeon_llvm_context_init() 1087 bld_base->op_actions[TGSI_OPCODE_ROUND].intr_name = "llvm.AMDIL.round.nearest."; in radeon_llvm_context_init()
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/external/mesa3d/src/gallium/drivers/svga/ |
D | svga_tgsi_insn.c | 2561 case TGSI_OPCODE_ROUND: in svga_emit_instruction() 3145 emit->info.opcode_count[TGSI_OPCODE_ROUND] >= 1 || in needs_to_create_zero()
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/external/mesa3d/src/gallium/drivers/r600/ |
D | r600_shader.c | 5269 {TGSI_OPCODE_ROUND, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE, tgsi_op2}, 5443 {TGSI_OPCODE_ROUND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE, tgsi_op2}, 5617 {TGSI_OPCODE_ROUND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_RNDNE, tgsi_op2},
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/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
D | nv50_ir_from_tgsi.cpp | 1982 case TGSI_OPCODE_ROUND: in handleInstruction()
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/external/mesa3d/src/mesa/state_tracker/ |
D | st_glsl_to_tgsi.cpp | 1824 emit(ir, TGSI_OPCODE_ROUND, result_dst, op[0]); in visit()
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