Searched refs:USUBO (Results 1 – 13 of 13) sorted by relevance
/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 235 SSUBO, USUBO, enumerator
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 230 case ISD::USUBO: return "usubo"; in getOperationName()
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D | LegalizeIntegerTypes.cpp | 130 case ISD::USUBO: Res = PromoteIntRes_UADDSUBO(N, ResNo); break; in PromoteIntegerResult() 1390 case ISD::USUBO: ExpandIntRes_UADDSUBO(N, Lo, Hi); break; in ExpandIntegerResult() 1713 ISD::UADDO : ISD::USUBO, in ExpandIntRes_ADDSUB() 1725 Lo = DAG.getNode(ISD::USUBO, dl, VTList, LoOps); in ExpandIntRes_ADDSUB()
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D | SelectionDAG.cpp | 2153 case ISD::USUBO: in computeKnownBits() 2614 case ISD::USUBO: in ComputeNumSignBits()
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D | LegalizeDAG.cpp | 3577 case ISD::USUBO: { in ExpandNode()
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D | SelectionDAGBuilder.cpp | 5083 case Intrinsic::usub_with_overflow: Op = ISD::USUBO; break; in visitIntrinsicCall()
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/external/llvm/lib/Target/AMDGPU/ |
D | R600ISelLowering.cpp | 100 setOperationAction(ISD::USUBO, MVT::i32, Custom); in R600TargetLowering() 598 case ISD::USUBO: return LowerUADDSUBO(Op, DAG, ISD::SUB, AMDGPUISD::BORROW); in LowerOperation()
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/external/llvm/test/CodeGen/X86/ |
D | xaluo.ll | 269 ; USUBO
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 258 setOperationAction(ISD::USUBO, MVT::i32, Custom); in AArch64TargetLowering() 259 setOperationAction(ISD::USUBO, MVT::i64, Custom); in AArch64TargetLowering() 1568 case ISD::USUBO: in getAArch64XALUOOp() 2275 case ISD::USUBO: in LowerOperation() 3604 Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO)) { in LowerBR_CC() 4053 Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO)) { in LowerSELECT()
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 802 setOperationAction(ISD::USUBO, VT, Expand); in initActions()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 1663 setOperationAction(ISD::USUBO, VT, Expand); in HexagonTargetLowering() 1750 ISD::SUBC, ISD::SADDO, ISD::UADDO, ISD::SSUBO, ISD::USUBO, in HexagonTargetLowering()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 720 setOperationAction(ISD::USUBO, MVT::i32, Custom); in ARMTargetLowering() 3415 case ISD::USUBO: in getARMXALUOOp() 3459 Opc == ISD::USUBO)) { in LowerSELECT() 6886 case ISD::USUBO: in LowerOperation()
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 1760 setOperationAction(ISD::USUBO, VT, Custom); in X86TargetLowering() 14990 } else if (CondOpcode == ISD::USUBO || CondOpcode == ISD::SSUBO || in LowerSELECT() 15002 case ISD::USUBO: X86Opcode = X86ISD::SUB; X86Cond = X86::COND_B; break; in LowerSELECT() 15473 Cond.getOperand(0).getOpcode() == ISD::USUBO || in LowerBRCOND() 15527 CondOpcode == ISD::USUBO || CondOpcode == ISD::SSUBO || in LowerBRCOND() 15546 case ISD::USUBO: X86Opcode = X86ISD::SUB; X86Cond = X86::COND_B; break; in LowerBRCOND() 19090 case ISD::USUBO: in LowerXALUO() 20131 case ISD::USUBO: in LowerOperation()
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