/external/llvm/lib/Target/ARM/ |
D | ARMTargetTransformInfo.cpp | 342 {ISD::VECTOR_SHUFFLE, MVT::v2i32, 1}, in getShuffleCost() 343 {ISD::VECTOR_SHUFFLE, MVT::v2f32, 1}, in getShuffleCost() 344 {ISD::VECTOR_SHUFFLE, MVT::v2i64, 1}, in getShuffleCost() 345 {ISD::VECTOR_SHUFFLE, MVT::v2f64, 1}, in getShuffleCost() 347 {ISD::VECTOR_SHUFFLE, MVT::v4i32, 2}, in getShuffleCost() 348 {ISD::VECTOR_SHUFFLE, MVT::v4f32, 2}, in getShuffleCost() 349 {ISD::VECTOR_SHUFFLE, MVT::v8i16, 2}, in getShuffleCost() 350 {ISD::VECTOR_SHUFFLE, MVT::v16i8, 2}}; in getShuffleCost() 354 if (const auto *Entry = CostTableLookup(NEONShuffleTbl, ISD::VECTOR_SHUFFLE, in getShuffleCost() 365 {ISD::VECTOR_SHUFFLE, MVT::v2f32, 1}, in getShuffleCost() [all …]
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D | ARMISelLowering.cpp | 115 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom); in addTypeForNEON() 622 setTargetDAGCombine(ISD::VECTOR_SHUFFLE); in ARMTargetLowering() 6871 case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); in LowerOperation() 10582 case ISD::VECTOR_SHUFFLE: return PerformVECTOR_SHUFFLECombine(N, DCI.DAG); in PerformDAGCombine()
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/external/llvm/lib/Target/X86/ |
D | X86TargetTransformInfo.cpp | 442 {ISD::VECTOR_SHUFFLE, MVT::v4i64, 1}, // vblendpd in getShuffleCost() 443 {ISD::VECTOR_SHUFFLE, MVT::v4f64, 1}, // vblendpd in getShuffleCost() 445 {ISD::VECTOR_SHUFFLE, MVT::v8i32, 1}, // vblendps in getShuffleCost() 446 {ISD::VECTOR_SHUFFLE, MVT::v8f32, 1}, // vblendps in getShuffleCost() 450 {ISD::VECTOR_SHUFFLE, MVT::v16i16, 5}, in getShuffleCost() 454 {ISD::VECTOR_SHUFFLE, MVT::v32i8, 9} in getShuffleCost() 459 ISD::VECTOR_SHUFFLE, LT.second)) in getShuffleCost() 464 {ISD::VECTOR_SHUFFLE, MVT::v2i64, 1}, in getShuffleCost() 465 {ISD::VECTOR_SHUFFLE, MVT::v2f64, 1}, in getShuffleCost() 469 {ISD::VECTOR_SHUFFLE, MVT::v4i32, 1}, in getShuffleCost() [all …]
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D | X86ISelLowering.cpp | 698 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand); in X86TargetLowering() 805 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4f32, Custom); in X86TargetLowering() 879 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom); in X86TargetLowering() 902 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f64, Custom); in X86TargetLowering() 903 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2i64, Custom); in X86TargetLowering() 1281 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom); in X86TargetLowering() 1410 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8i1, Custom); in X86TargetLowering() 1411 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i1, Custom); in X86TargetLowering() 1599 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom); in X86TargetLowering() 1652 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v32i16, Custom); in X86TargetLowering() [all …]
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D | X86InstrFragmentsSIMD.td | 293 // Specific shuffle nodes - At some point ISD::VECTOR_SHUFFLE will always get
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 305 VECTOR_SHUFFLE, enumerator
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D | SelectionDAGNodes.h | 1374 : SDNode(ISD::VECTOR_SHUFFLE, Order, dl, getSDVTList(VT)), Mask(M) { 1416 return N->getOpcode() == ISD::VECTOR_SHUFFLE;
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/external/llvm/test/CodeGen/ARM/ |
D | vext.ll | 165 ; this rather than blindly emitting a VECTOR_SHUFFLE (infinite
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/external/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 69 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8i32, Expand); in SITargetLowering() 70 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8f32, Expand); in SITargetLowering() 71 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i32, Expand); in SITargetLowering() 72 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16f32, Expand); in SITargetLowering()
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D | AMDGPUISelLowering.cpp | 333 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand); in AMDGPUTargetLowering() 366 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand); in AMDGPUTargetLowering()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 223 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; in getOperationName()
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D | LegalizeVectorTypes.cpp | 68 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break; in ScalarizeVectorResult() 620 case ISD::VECTOR_SHUFFLE: in SplitVectorResult() 2016 case ISD::VECTOR_SHUFFLE: in WidenVectorResult()
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D | DAGCombiner.cpp | 1440 case ISD::VECTOR_SHUFFLE: return visitVECTOR_SHUFFLE(N); in visit() 2800 if (N0.getOpcode() == ISD::VECTOR_SHUFFLE && Level < AfterLegalizeDAG) { in SimplifyBinOpWithSameOpcodeHands() 7458 N0->getOpcode() == ISD::VECTOR_SHUFFLE && in visitBITCAST() 12198 if (ConstEltNo && InVec.getOpcode() == ISD::VECTOR_SHUFFLE) { in visitEXTRACT_VECTOR_ELT() 12546 if (LegalOperations && !TLI.isOperationLegal(ISD::VECTOR_SHUFFLE, VT)) in visitBUILD_VECTOR() 13396 if (BC0.getOpcode() == ISD::VECTOR_SHUFFLE && BC0.hasOneUse()) { in visitVECTOR_SHUFFLE() 13449 if (N1.getOpcode() == ISD::VECTOR_SHUFFLE && in visitVECTOR_SHUFFLE() 13450 N0.getOpcode() != ISD::VECTOR_SHUFFLE && Level < AfterLegalizeDAG && in visitVECTOR_SHUFFLE() 13473 if (N0.getOpcode() == ISD::VECTOR_SHUFFLE && N->isOnlyUserOf(N0.getNode()) && in visitVECTOR_SHUFFLE()
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D | SelectionDAG.cpp | 514 case ISD::VECTOR_SHUFFLE: { in AddNodeIDCustom() 1641 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops); in getVectorShuffle() 3946 case ISD::VECTOR_SHUFFLE: in getNode()
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D | LegalizeDAG.cpp | 3212 case ISD::VECTOR_SHUFFLE: { in ExpandNode() 4356 case ISD::VECTOR_SHUFFLE: { in PromoteNode()
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D | LegalizeIntegerTypes.cpp | 94 case ISD::VECTOR_SHUFFLE: in PromoteIntegerResult()
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | AMDILISelLowering.cpp | 166 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand); in InitAMDILLowering()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 1769 ISD::CONCAT_VECTORS, ISD::VECTOR_SHUFFLE in HexagonTargetLowering() 1808 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4i16, Custom); in HexagonTargetLowering() 1809 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8i8, Custom); in HexagonTargetLowering() 2589 case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); in LowerOperation()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 427 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Promote); in PPCTargetLowering() 428 AddPromotedToType (ISD::VECTOR_SHUFFLE, VT, MVT::v16i8); in PPCTargetLowering() 500 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i8, Custom); in PPCTargetLowering() 601 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f64, Legal); in PPCTargetLowering() 636 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2i64, Legal); in PPCTargetLowering() 682 setOperationAction(ISD::VECTOR_SHUFFLE , MVT::v4f64, Custom); in PPCTargetLowering() 732 setOperationAction(ISD::VECTOR_SHUFFLE , MVT::v4f32, Custom); in PPCTargetLowering() 774 setOperationAction(ISD::VECTOR_SHUFFLE , MVT::v4i1, Custom); in PPCTargetLowering() 7995 case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); in LowerOperation()
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D | PPCISelDAGToDAG.cpp | 2837 case ISD::VECTOR_SHUFFLE: in Select()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 293 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom); in SystemZTargetLowering() 3656 else if (Op.getOpcode() == ISD::VECTOR_SHUFFLE && Op.hasOneUse()) { in add() 4397 case ISD::VECTOR_SHUFFLE: in LowerOperation() 4552 else if (Opcode == ISD::VECTOR_SHUFFLE && in combineExtract()
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/external/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 1602 case ShuffleVector: return ISD::VECTOR_SHUFFLE; in InstructionOpcodeToISD()
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/external/llvm/lib/Target/Mips/ |
D | MipsSEISelLowering.cpp | 274 setOperationAction(ISD::VECTOR_SHUFFLE, Ty, Custom); in addMSAIntType() 378 case ISD::VECTOR_SHUFFLE: return lowerVECTOR_SHUFFLE(Op, DAG); in LowerOperation()
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 531 def vector_shuffle : SDNode<"ISD::VECTOR_SHUFFLE", SDTVecShuffle, []>;
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 665 setOperationAction(ISD::VECTOR_SHUFFLE, VT.getSimpleVT(), Custom); in addTypeForNEON() 2301 case ISD::VECTOR_SHUFFLE: in LowerOperation() 8815 if (Shuffle.getOpcode() != ISD::VECTOR_SHUFFLE) { in tryMatchAcrossLaneShuffleForReduction() 8820 if (Shuffle.getOpcode() != ISD::VECTOR_SHUFFLE) in tryMatchAcrossLaneShuffleForReduction()
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