Searched refs:X0101 (Results 1 – 1 of 1) sorted by relevance
/external/valgrind/VEX/priv/ |
D | host_arm_defs.c | 2718 #define X0101 BITS4(0,1,0,1) macro 2812 instr = XXXXX___(X1110,X0101,X1001,X1111,rD); in imm32_to_ireg() 2941 instr = XXXXX___(X1110,X0101,BITS4(bP,bB,0,bL), in do_load_or_store32() 2978 case ARMalu_ADC: subopc = X0101; break; in emit_ARMInstr() 3098 instr = XXXXX___(cc,X0101,BITS4(bP,bB,0,bL), in emit_ARMInstr() 4049 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X0000, regD, X0101, in emit_ARMInstr() 4057 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X0000, regD, X0101, in emit_ARMInstr() 4178 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X1011, regD, X0101, in emit_ARMInstr() 4186 insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X1011, regD, X0101, in emit_ARMInstr() 4523 amt & 0xF, Vd, X0101, BITS4(L,Q,M,1), Vm); in emit_ARMInstr() [all …]
|