Searched refs:addPred (Results 1 – 9 of 9) sorted by relevance
282 UseSU->addPred(Dep); in addPhysRegDataDeps()313 DefSU->addPred(SDep(SU, Kind, /*Reg=*/*Alias)); in addPhysRegDeps()318 DefSU->addPred(Dep); in addPhysRegDeps()429 UseSU->addPred(Dep); in addVRegDefDeps()471 DefSU->addPred(Dep); in addVRegDefDeps()513 V2SU.SU->addPred(SDep(SU, SDep::Anti, Reg)); in addVRegUseDeps()668 SUb->addPred(SDep(SUa, SDep::MayAliasMem)); in iterateChainSucc()702 (*I)->addPred(Dep); in adjustChainDeps()728 SUb->addPred(Dep); in addChainDependency()939 ExitSU.addPred(Dep); in buildSchedGraph()[all …]
65 bool SUnit::addPred(const SDep &D, bool Required) { in addPred() function in SUnit
533 SuccSU->addPred(PredDep, /*Required=*/!PredDep.isArtificial()); in addEdge()
414 bool addPred(const SDep &D, bool Required = true);
310 void addPred(BasicBlock *Pred) { Preds.push_back(Pred); } in addPred() function in __anon979cef4e0111::BBState1398 SuccStates.addPred(CurrBB); in ComputePostOrders()1405 BBStates[SuccBB].addPred(CurrBB); in ComputePostOrders()
34 SUnits[su].addPred(SDep(LastSequentialCall, SDep::Barrier)); in postprocessDAG()
89 SU->addPred(D); in AddPred()
494 if (!SU->addPred(Dep) && !Dep.isCtrl() && OpSU->NumRegDefsLeft > 1) { in AddSchedEdges()
201 SU->addPred(D); in AddPred()