Searched refs:adde (Results 1 – 25 of 32) sorted by relevance
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18 %adde = add i8 %addd, %e19 %addf = add i8 %adde, %f36 %adde = add i16 %addd, %e37 %addf = add i16 %adde, %f54 %adde = add i32 %addd, %e55 %addf = add i32 %adde, %f72 %adde = add i64 %addd, %e73 %addf = add i64 %adde, %f
124 ; Add the upper 64-bits using adde on registers 4 and 6132 ; Add the upper 64-bits using adde on registers 3 and 5139 ; CHECK-LE-NEXT: adde 4, 4, 6144 ; CHECK-BE-NEXT: adde 3, 3, 5149 ; CHECK-LE-NOVSX-NEXT: adde 4, 4, 6154 ; CHECK-BE-NOVSX-NEXT: adde 3, 3, 5
4 ; RUN: grep "adde 3, 3, 5"
10 ; CHECK: adde r3, r5, r3
460 adde 0000000000000000, 0000000000000000 => 0000000000000000 (00000000 00000000)461 adde 0000000000000000, 0000001cbe991def => 0000001cbe991def (00000000 00000000)462 adde 0000000000000000, ffffffffffffffff => ffffffffffffffff (00000000 00000000)463 adde 0000001cbe991def, 0000000000000000 => 0000001cbe991def (00000000 00000000)464 adde 0000001cbe991def, 0000001cbe991def => 000000397d323bde (00000000 00000000)465 adde 0000001cbe991def, ffffffffffffffff => 0000001cbe991dee (00000000 20000000)466 adde ffffffffffffffff, 0000000000000000 => ffffffffffffffff (00000000 00000000)467 adde ffffffffffffffff, 0000001cbe991def => 0000001cbe991dee (00000000 20000000)468 adde ffffffffffffffff, ffffffffffffffff => fffffffffffffffe (00000000 20000000)469 adde 0000000000000000, 0000000000000000 => 0000000000000001 (00000000 00000000)[all …]
300 adde 00000000, 00000000 => 00000000 (00000000 00000000)301 adde 00000000, 000f423f => 000f423f (00000000 00000000)302 adde 00000000, ffffffff => ffffffff (00000000 00000000)303 adde 000f423f, 00000000 => 000f423f (00000000 00000000)304 adde 000f423f, 000f423f => 001e847e (00000000 00000000)305 adde 000f423f, ffffffff => 000f423e (00000000 20000000)306 adde ffffffff, 00000000 => ffffffff (00000000 00000000)307 adde ffffffff, 000f423f => 000f423e (00000000 20000000)308 adde ffffffff, ffffffff => fffffffe (00000000 20000000)309 adde 00000000, 00000000 => 00000001 (00000000 00000000)[all …]
30 ; fix subc / sube (and addc / adde) to use physical register dependency instead.
335 # CHECK-BE: adde 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x14]336 # CHECK-LE: adde 2, 3, 4 # encoding: [0x14,0x21,0x43,0x7c]337 adde 2, 3, 4338 # CHECK-BE: adde. 2, 3, 4 # encoding: [0x7c,0x43,0x21,0x15]339 # CHECK-LE: adde. 2, 3, 4 # encoding: [0x15,0x21,0x43,0x7c]340 adde. 2, 3, 4
434 [(set GR8:$dst, (adde GR8:$src, GR8:$src2)),439 [(set GR16:$dst, (adde GR16:$src, GR16:$src2)),446 [(set GR8:$dst, (adde GR8:$src, imm:$src2)),451 [(set GR16:$dst, (adde GR16:$src, imm:$src2)),457 [(set GR8:$dst, (adde GR8:$src, (load addr:$src2))),462 [(set GR16:$dst, (adde GR16:$src, (load addr:$src2))),469 [(store (adde (load addr:$dst), GR8:$src), addr:$dst),474 [(store (adde (load addr:$dst), GR16:$src), addr:$dst),480 [(store (adde (load addr:$dst), (i8 imm:$src)), addr:$dst),485 [(store (adde (load addr:$dst), (i16 imm:$src)), addr:$dst),[all …]
265 # CHECK: adde 2, 3, 4268 # CHECK: adde. 2, 3, 4
265 # CHECK: adde 2, 3, 4 268 # CHECK: adde. 2, 3, 4
506 "adde", "$rT, $rA, $rB", IIC_IntGeneral,507 [(set i64:$rT, (adde i64:$rA, i64:$rB))]>;510 [(set i64:$rT, (adde i64:$rA, -1))]>;513 [(set i64:$rT, (adde i64:$rA, 0))]>;
479 adde r3,r3,r3
2416 "adde", "$rT, $rA, $rB", IIC_IntGeneral,2417 [(set i32:$rT, (adde i32:$rA, i32:$rB))]>;2420 [(set i32:$rT, (adde i32:$rA, -1))]>;2423 [(set i32:$rT, (adde i32:$rA, 0))]>;
764 def ALCR : BinaryRRE<"alc", 0xB998, adde, GR32, GR32>;765 def ALCGR : BinaryRRE<"alcg", 0xB988, adde, GR64, GR64>;768 def ALC : BinaryRXY<"alc", 0xE398, adde, GR32, load, 4>;769 def ALCG : BinaryRXY<"alcg", 0xE388, adde, GR64, load, 8>;
326 def AddCCCV4I32 : VecBinaryOp<V4AsmStr<"addc.cc.s32">, adde, V4I32Regs,328 def AddCCCV2I32 : VecBinaryOp<V2AsmStr<"addc.cc.s32">, adde, V2I32Regs,
825 void adde(Register dst, Register src1, Register src2, OEBit o = LeaveOE,
873 void Assembler::adde(Register dst, Register src1, Register src2, OEBit o, in adde() function in v8::internal::Assembler
388 def adde : SDNode<"ISD::ADDE" , SDTIntBinOp,
1053 __ adde(i.OutputRegister(1), i.InputRegister(1), i.InputRegister(3)); in AssembleArchInstruction() local
1344 def : DSPBinPat<ADDWC, i32, adde>;
876 [(set tGPR:$Rdn, (adde tGPR:$Rn, tGPR:$Rm))]>, Sched<[WriteALU]>;
595 defm ADDE : F3_12<"addxcc", 0b011000, adde, IntRegs, i32, simm13Op>;
21034 0x25480780: 7C000114 adde r0,r0,r021053 0x2548078C: 7D294914 adde r9,r9,r921090 0x254807A0: 7C000114 adde r0,r0,r021109 0x254807AC: 7D294914 adde r9,r9,r923559 0x25475F20: 7E699914 adde r19,r9,r1923579 0x25475F2C: 7E4A9114 adde r18,r10,r1824559 0x254727D8: 7CC03114 adde r6,r0,r625236 0x2547A350: 7C091914 adde r0,r9,r327991 0x2547694C: 7D896114 adde r12,r9,r1228113 0x2547694C: 7D896114 adde r12,r9,r12[all …]