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Searched refs:getMachineOpValue (Results 1 – 18 of 18) sorted by relevance

/external/llvm/lib/Target/SystemZ/MCTargetDesc/
DSystemZMCCodeEmitter.cpp52 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
137 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SystemZMCCodeEmitter
151 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr12Encoding()
152 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr12Encoding()
161 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDAddr20Encoding()
162 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDAddr20Encoding()
171 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr12Encoding()
172 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI); in getBDXAddr12Encoding()
173 uint64_t Index = getMachineOpValue(MI, MI.getOperand(OpNum + 2), Fixups, STI); in getBDXAddr12Encoding()
182 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI); in getBDXAddr20Encoding()
[all …]
/external/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCCodeEmitter.cpp93 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
157 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
169 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getCondBrEncoding()
182 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsDirectBrEncoding()
195 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsCondBrEncoding()
207 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getImm16Encoding()
221 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 16; in getMemRIEncoding()
225 return (getMachineOpValue(MI, MO, Fixups, STI) & 0xFFFF) | RegBits; in getMemRIEncoding()
240 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 14; in getMemRIXEncoding()
244 return ((getMachineOpValue(MI, MO, Fixups, STI) >> 2) & 0x3FFF) | RegBits; in getMemRIXEncoding()
[all …]
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsMCCodeEmitter.cpp436 unsigned Res = getMachineOpValue(MI, MO, Fixups, STI); in getUImm5Lsl2Encoding()
645 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in MipsMCCodeEmitter
671 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo),Fixups, STI) << 16; in getMSAMemEncoding()
672 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI); in getMSAMemEncoding()
715 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo),Fixups, STI) << 16; in getMemEncoding()
716 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI); in getMemEncoding()
727 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4()
729 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4()
741 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl1()
743 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl1()
[all …]
DMipsMCCodeEmitter.h156 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
/external/llvm/lib/Target/Sparc/MCTargetDesc/
DSparcMCCodeEmitter.cpp56 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
105 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI); in encodeInstruction()
115 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SparcMCCodeEmitter
147 return getMachineOpValue(MI, MO, Fixups, STI); in getCallTargetOpValue()
182 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
195 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchPredTargetOpValue()
207 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchOnRegTargetOpValue()
/external/llvm/lib/Target/WebAssembly/MCTargetDesc/
DWebAssemblyMCCodeEmitter.cpp48 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
68 unsigned WebAssemblyMCCodeEmitter::getMachineOpValue( in getMachineOpValue() function in WebAssemblyMCCodeEmitter
/external/llvm/lib/Target/AMDGPU/MCTargetDesc/
DSIMCCodeEmitter.cpp59 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
240 return getMachineOpValue(MI, MO, Fixups, STI); in getSOPPBrEncoding()
243 uint64_t SIMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in SIMCCodeEmitter
DR600MCCodeEmitter.cpp49 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
165 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in R600MCCodeEmitter
DAMDGPUMCCodeEmitter.h35 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function
/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/
DSIMCCodeEmitter.cpp78 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
140 uint64_t SIMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in SIMCCodeEmitter
207 (getMachineOpValue(MI, OffsetOp, Fixup) & SMRD_OFFSET_MASK) in SMRDmemriEncode()
DAMDGPUMCCodeEmitter.h31 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function
DR600MCCodeEmitter.cpp57 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
620 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in R600MCCodeEmitter
/external/llvm/lib/Target/BPF/MCTargetDesc/
DBPFMCCodeEmitter.cpp49 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
75 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getMachineOpValue() function in BPFMCCodeEmitter
/external/mesa3d/src/gallium/drivers/radeon/
DAMDGPUCodeEmitter.h22 virtual uint64_t getMachineOpValue(const MachineInstr &MI, in getMachineOpValue() function
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCCodeEmitter.h63 unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO,
DHexagonMCCodeEmitter.cpp722 HexagonMCCodeEmitter::getMachineOpValue(MCInst const &MI, MCOperand const &MO, in getMachineOpValue() function in HexagonMCCodeEmitter
/external/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64MCCodeEmitter.cpp54 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
204 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in AArch64MCCodeEmitter
/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMMCCodeEmitter.cpp74 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
529 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in ARMMCCodeEmitter