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Searched refs:hasMips32r6 (Results 1 – 13 of 13) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsSubtarget.h206 bool hasMips32r6() const { in hasMips32r6() function
242 bool inMicroMips32r6Mode() const { return InMicroMipsMode && hasMips32r6(); } in inMicroMips32r6Mode()
287 bool systemSupportsUnalignedAccess() const { return hasMips32r6(); } in systemSupportsUnalignedAccess()
DMipsSubtarget.cpp108 if (hasMips32r6()) { in MipsSubtarget()
DMipsRegisterInfo.cpp93 return Subtarget.hasMips32r6() ? CSR_Interrupt_32R6_SaveList in getCalleeSavedRegs()
DMipsLongBranch.cpp276 unsigned BalOp = Subtarget.hasMips32r6() ? Mips::BAL : Mips::BAL_BR; in expandToLongBranch()
DMipsISelLowering.cpp234 if (Subtarget.hasMips32r6()) in MipsTargetLowering()
1073 LL = Subtarget.hasMips32r6() ? Mips::LL_R6 : Mips::LL; in emitAtomicBinary()
1074 SC = Subtarget.hasMips32r6() ? Mips::SC_R6 : Mips::SC; in emitAtomicBinary()
1342 LL = Subtarget.hasMips32r6() ? Mips::LL_R6 : Mips::LL; in emitAtomicCmpSwap()
1343 SC = Subtarget.hasMips32r6() ? Mips::SC_R6 : Mips::SC; in emitAtomicCmpSwap()
1620 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerBRCOND()
1640 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerSELECT()
1666 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerSETCC()
DMipsAsmPrinter.cpp107 } else if (Subtarget->hasMips32r6()) { in emitPseudoIndirectBranch()
DMipsSEISelDAGToDAG.cpp997 } else if (Subtarget->hasMips32r6()) { in SelectInlineAsmMemoryOperand()
DMipsSEISelLowering.cpp155 if (Subtarget.hasMips32r6()) { in MipsSETargetLowering()
534 if (Subtarget.hasMips32() && !Subtarget.hasMips32r6() && in performADDECombine()
1275 assert(!Subtarget.hasMips32r6()); in lowerMulDiv()
DMipsFastISel.cpp195 bool ISASupported = !Subtarget->hasMips32r6() && Subtarget->hasMips32(); in MipsFastISel()
DMipsInstrInfo.td174 def HasMips32r6 : Predicate<"Subtarget->hasMips32r6()">,
176 def NotMips32r6 : Predicate<"!Subtarget->hasMips32r6()">,
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsABIFlagsSection.h101 if (P.hasMips32r6()) in setISALevelAndRevisionFromPredicates()
/external/llvm/lib/Target/Mips/Disassembler/
DMipsDisassembler.cpp44 bool hasMips32r6() const { in hasMips32r6() function in __anonac374e550111::MipsDisassembler
875 if (hasMips32r6()) { in getInstruction()
901 if (hasMips32r6()) { in getInstruction()
942 if (hasMips32r6() && isGP64()) { in getInstruction()
952 if (hasMips32r6()) { in getInstruction()
/external/llvm/lib/Target/Mips/AsmParser/
DMipsAsmParser.cpp507 bool hasMips32r6() const { in hasMips32r6() function in __anon5de389750211::MipsAsmParser
1591 if (hasMips32r6() && Inst.getOpcode() == Mips::SSNOP) { in processInstruction()
2107 JalrInst.setOpcode(hasMips32r6() ? Mips::JALRC16_MMR6 : Mips::JALR16_MM); in expandJalWithRegs()
2483 Inst.setOpcode(hasMips32r6() ? Mips::BC16_MMR6 : Mips::B16_MM); in expandUncondBranchMMPseudo()
2646 if (inMicroMipsMode() && hasMips32r6()) in expandLoadStoreMultiple()
2917 if (hasMips32r6()) { in expandDiv()
3032 if (hasMips32r6() || hasMips64r6()) { in expandUlh()
3109 if (hasMips32r6() || hasMips64r6()) { in expandUlw()