Searched refs:hasMips32r6 (Results 1 – 13 of 13) sorted by relevance
206 bool hasMips32r6() const { in hasMips32r6() function242 bool inMicroMips32r6Mode() const { return InMicroMipsMode && hasMips32r6(); } in inMicroMips32r6Mode()287 bool systemSupportsUnalignedAccess() const { return hasMips32r6(); } in systemSupportsUnalignedAccess()
108 if (hasMips32r6()) { in MipsSubtarget()
93 return Subtarget.hasMips32r6() ? CSR_Interrupt_32R6_SaveList in getCalleeSavedRegs()
276 unsigned BalOp = Subtarget.hasMips32r6() ? Mips::BAL : Mips::BAL_BR; in expandToLongBranch()
234 if (Subtarget.hasMips32r6()) in MipsTargetLowering()1073 LL = Subtarget.hasMips32r6() ? Mips::LL_R6 : Mips::LL; in emitAtomicBinary()1074 SC = Subtarget.hasMips32r6() ? Mips::SC_R6 : Mips::SC; in emitAtomicBinary()1342 LL = Subtarget.hasMips32r6() ? Mips::LL_R6 : Mips::LL; in emitAtomicCmpSwap()1343 SC = Subtarget.hasMips32r6() ? Mips::SC_R6 : Mips::SC; in emitAtomicCmpSwap()1620 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerBRCOND()1640 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerSELECT()1666 assert(!Subtarget.hasMips32r6() && !Subtarget.hasMips64r6()); in lowerSETCC()
107 } else if (Subtarget->hasMips32r6()) { in emitPseudoIndirectBranch()
997 } else if (Subtarget->hasMips32r6()) { in SelectInlineAsmMemoryOperand()
155 if (Subtarget.hasMips32r6()) { in MipsSETargetLowering()534 if (Subtarget.hasMips32() && !Subtarget.hasMips32r6() && in performADDECombine()1275 assert(!Subtarget.hasMips32r6()); in lowerMulDiv()
195 bool ISASupported = !Subtarget->hasMips32r6() && Subtarget->hasMips32(); in MipsFastISel()
174 def HasMips32r6 : Predicate<"Subtarget->hasMips32r6()">,176 def NotMips32r6 : Predicate<"!Subtarget->hasMips32r6()">,
101 if (P.hasMips32r6()) in setISALevelAndRevisionFromPredicates()
44 bool hasMips32r6() const { in hasMips32r6() function in __anonac374e550111::MipsDisassembler875 if (hasMips32r6()) { in getInstruction()901 if (hasMips32r6()) { in getInstruction()942 if (hasMips32r6() && isGP64()) { in getInstruction()952 if (hasMips32r6()) { in getInstruction()
507 bool hasMips32r6() const { in hasMips32r6() function in __anon5de389750211::MipsAsmParser1591 if (hasMips32r6() && Inst.getOpcode() == Mips::SSNOP) { in processInstruction()2107 JalrInst.setOpcode(hasMips32r6() ? Mips::JALRC16_MMR6 : Mips::JALR16_MM); in expandJalWithRegs()2483 Inst.setOpcode(hasMips32r6() ? Mips::BC16_MMR6 : Mips::B16_MM); in expandUncondBranchMMPseudo()2646 if (inMicroMipsMode() && hasMips32r6()) in expandLoadStoreMultiple()2917 if (hasMips32r6()) { in expandDiv()3032 if (hasMips32r6() || hasMips64r6()) { in expandUlh()3109 if (hasMips32r6() || hasMips64r6()) { in expandUlw()