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Searched refs:host_EvC_FAILADDR (Results 1 – 19 of 19) sorted by relevance

/external/valgrind/VEX/priv/
Dmain_main.c609 offB_HOST_EvC_FAILADDR = offsetof(VexGuestX86State,host_EvC_FAILADDR); in LibVEX_Translate()
630 offB_HOST_EvC_FAILADDR = offsetof(VexGuestAMD64State,host_EvC_FAILADDR); in LibVEX_Translate()
651 offB_HOST_EvC_FAILADDR = offsetof(VexGuestPPC32State,host_EvC_FAILADDR); in LibVEX_Translate()
672 offB_HOST_EvC_FAILADDR = offsetof(VexGuestPPC64State,host_EvC_FAILADDR); in LibVEX_Translate()
695 offB_HOST_EvC_FAILADDR = offsetof(VexGuestS390XState,host_EvC_FAILADDR); in LibVEX_Translate()
716 offB_HOST_EvC_FAILADDR = offsetof(VexGuestARMState,host_EvC_FAILADDR); in LibVEX_Translate()
737 offB_HOST_EvC_FAILADDR = offsetof(VexGuestARM64State,host_EvC_FAILADDR); in LibVEX_Translate()
758 offB_HOST_EvC_FAILADDR = offsetof(VexGuestMIPS32State,host_EvC_FAILADDR); in LibVEX_Translate()
780 offB_HOST_EvC_FAILADDR = offsetof(VexGuestMIPS64State,host_EvC_FAILADDR); in LibVEX_Translate()
802 offB_HOST_EvC_FAILADDR = offsetof(VexGuestTILEGXState,host_EvC_FAILADDR); in LibVEX_Translate()
Dguest_ppc_helpers.c367 vex_state->host_EvC_FAILADDR = 0; in LibVEX_GuestPPC32_initialise()
536 vex_state->host_EvC_FAILADDR = 0; in LibVEX_GuestPPC64_initialise()
Dguest_mips_helpers.c156 vex_state->host_EvC_FAILADDR = 0; in LibVEX_GuestMIPS32_initialise()
264 vex_state->host_EvC_FAILADDR = 0; in LibVEX_GuestMIPS64_initialise()
Dguest_arm_helpers.c1003 vex_state->host_EvC_FAILADDR = 0; in LibVEX_GuestARM_initialise()
Dguest_s390_helpers.c136 state->host_EvC_FAILADDR = 0; in LibVEX_GuestS390X_initialise()
Dguest_x86_helpers.c2822 vex_state->host_EvC_FAILADDR = 0; in LibVEX_GuestX86_initialise()
Dguest_amd64_helpers.c4241 vex_state->host_EvC_FAILADDR = 0; in LibVEX_GuestAMD64_initialise()
/external/valgrind/VEX/pub/
Dlibvex_guest_s390x.h148 /* 424 */ ULong host_EvC_FAILADDR; member
Dlibvex_guest_arm.h45 UInt host_EvC_FAILADDR; /* 0 */ member
Dlibvex_guest_amd64.h57 /* 0 */ ULong host_EvC_FAILADDR; member
Dlibvex_guest_arm64.h44 /* 0 */ ULong host_EvC_FAILADDR; member
Dlibvex_guest_tilegx.h123 /* 592 */ ULong host_EvC_FAILADDR; member
Dlibvex_guest_mips64.h145 ULong host_EvC_FAILADDR; /* 600 */ member
Dlibvex_guest_mips32.h139 /* 440 */ UInt host_EvC_FAILADDR; member
Dlibvex_guest_x86.h145 UInt host_EvC_FAILADDR; /* 0 */ member
Dlibvex_guest_ppc32.h51 /* 0 */ UInt host_EvC_FAILADDR; member
Dlibvex_guest_ppc64.h90 /* 0 */ ULong host_EvC_FAILADDR; member
/external/valgrind/VEX/switchback/
Dswitchback.c774 gst.host_EvC_FAILADDR = 0x5a5a5a5a5a5a5a5a; in main()
/external/valgrind/coregrind/m_scheduler/
Dscheduler.c925 tst->arch.vex.host_EvC_FAILADDR in run_thread_for_a_while()
979 vg_assert(tst->arch.vex.host_EvC_FAILADDR in run_thread_for_a_while()