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/external/v8/test/mjsunit/wasm/embenchen/
Dlua_binarytrees.js7389 …var i1 = 0, i2 = 0, i3 = 0, i4 = 0, i5 = 0, i6 = 0, i7 = 0, i8 = 0, i9 = 0, i10 = 0, i11 = 0, i13 …
7402 i6 = (i21 & 1 ^ 1) + i20 | 0;
7403 i5 = i6 << 1;
7423 HEAP32[3228] = i18 & ~(1 << i6);
7426 i32 = i6 << 3;
7441 i6 = i7 >>> 5 & 8;
7442 i7 = i7 >>> i6;
7448 i3 = (i6 | i2 | i5 | i4 | i3) + (i7 >>> i3) | 0;
7454 i6 = HEAP32[i2 >> 2] | 0;
7456 if ((i4 | 0) != (i6 | 0)) {
[all …]
Dbox2d.js6155 …var i1 = 0, i2 = 0, i3 = 0, i4 = 0, i5 = 0, i6 = 0, i7 = 0, i8 = 0, i9 = 0, i10 = 0, i11 = 0, i13 …
6168 i6 = (i21 & 1 ^ 1) + i20 | 0;
6169 i5 = i6 << 1;
6189 HEAP32[1790] = i18 & ~(1 << i6);
6192 i32 = i6 << 3;
6207 i6 = i7 >>> 5 & 8;
6208 i7 = i7 >>> i6;
6214 i3 = (i6 | i2 | i5 | i4 | i3) + (i7 >>> i3) | 0;
6220 i6 = HEAP32[i2 >> 2] | 0;
6222 if ((i4 | 0) != (i6 | 0)) {
[all …]
Dzlib.js5775 …var i1 = 0, i4 = 0, i5 = 0, i6 = 0, i7 = 0, i8 = 0, i9 = 0, i10 = 0, i11 = 0, i12 = 0, i13 = 0, i1…
5815 i6 = i4 + 60 | 0;
5856 i67 = HEAP32[i6 >> 2] | 0;
6948 HEAP32[i6 >> 2] = i63;
6955 i63 = HEAP32[i6 >> 2] | 0;
7441 HEAP32[i6 >> 2] = i63;
7464 HEAP32[i6 >> 2] = i63;
7503 …HEAP32[i2 + 44 >> 2] = ((HEAP32[i7 >> 2] | 0) != 0 ? 64 : 0) + (HEAP32[i6 >> 2] | 0) + ((i4 | 0) =…
7510 …var i1 = 0, i2 = 0, i3 = 0, i4 = 0, i5 = 0, i6 = 0, i7 = 0, i8 = 0, i9 = 0, i10 = 0, i11 = 0, i13 …
7523 i6 = (i21 & 1 ^ 1) + i20 | 0;
[all …]
Dfannkuch.js5747 …var i1 = 0, i2 = 0, i3 = 0, i4 = 0, i5 = 0, i6 = 0, i7 = 0, i8 = 0, i9 = 0, i10 = 0, i11 = 0, i13 …
5760 i6 = (i21 & 1 ^ 1) + i20 | 0;
5761 i5 = i6 << 1;
5781 HEAP32[14] = i18 & ~(1 << i6);
5784 i32 = i6 << 3;
5799 i6 = i7 >>> 5 & 8;
5800 i7 = i7 >>> i6;
5806 i3 = (i6 | i2 | i5 | i4 | i3) + (i7 >>> i3) | 0;
5812 i6 = HEAP32[i2 >> 2] | 0;
5814 if ((i4 | 0) != (i6 | 0)) {
[all …]
Dfasta.js5923 …var i1 = 0, i2 = 0, i3 = 0, i4 = 0, i5 = 0, i6 = 0, i7 = 0, i8 = 0, i9 = 0, i10 = 0, i11 = 0, i13 …
5936 i6 = (i21 & 1 ^ 1) + i20 | 0;
5937 i5 = i6 << 1;
5957 HEAP32[146] = i18 & ~(1 << i6);
5960 i32 = i6 << 3;
5975 i6 = i7 >>> 5 & 8;
5976 i7 = i7 >>> i6;
5982 i3 = (i6 | i2 | i5 | i4 | i3) + (i7 >>> i3) | 0;
5988 i6 = HEAP32[i2 >> 2] | 0;
5990 if ((i4 | 0) != (i6 | 0)) {
[all …]
Dmemops.js5692 …var i1 = 0, i2 = 0, i3 = 0, i4 = 0, i5 = 0, i6 = 0, i7 = 0, i8 = 0, i9 = 0, i10 = 0, i11 = 0, i13 …
5705 i6 = (i21 & 1 ^ 1) + i20 | 0;
5706 i5 = i6 << 1;
5726 HEAP32[10] = i18 & ~(1 << i6);
5729 i32 = i6 << 3;
5744 i6 = i7 >>> 5 & 8;
5745 i7 = i7 >>> i6;
5751 i3 = (i6 | i2 | i5 | i4 | i3) + (i7 >>> i3) | 0;
5757 i6 = HEAP32[i2 >> 2] | 0;
5759 if ((i4 | 0) != (i6 | 0)) {
[all …]
/external/v8/test/mjsunit/asm/embenchen/
Dlua_binarytrees.js7386 …var i1 = 0, i2 = 0, i3 = 0, i4 = 0, i5 = 0, i6 = 0, i7 = 0, i8 = 0, i9 = 0, i10 = 0, i11 = 0, i13 …
7399 i6 = (i21 & 1 ^ 1) + i20 | 0;
7400 i5 = i6 << 1;
7420 HEAP32[3228] = i18 & ~(1 << i6);
7423 i32 = i6 << 3;
7438 i6 = i7 >>> 5 & 8;
7439 i7 = i7 >>> i6;
7445 i3 = (i6 | i2 | i5 | i4 | i3) + (i7 >>> i3) | 0;
7451 i6 = HEAP32[i2 >> 2] | 0;
7453 if ((i4 | 0) != (i6 | 0)) {
[all …]
Dbox2d.js6152 …var i1 = 0, i2 = 0, i3 = 0, i4 = 0, i5 = 0, i6 = 0, i7 = 0, i8 = 0, i9 = 0, i10 = 0, i11 = 0, i13 …
6165 i6 = (i21 & 1 ^ 1) + i20 | 0;
6166 i5 = i6 << 1;
6186 HEAP32[1790] = i18 & ~(1 << i6);
6189 i32 = i6 << 3;
6204 i6 = i7 >>> 5 & 8;
6205 i7 = i7 >>> i6;
6211 i3 = (i6 | i2 | i5 | i4 | i3) + (i7 >>> i3) | 0;
6217 i6 = HEAP32[i2 >> 2] | 0;
6219 if ((i4 | 0) != (i6 | 0)) {
[all …]
Dzlib.js5772 …var i1 = 0, i4 = 0, i5 = 0, i6 = 0, i7 = 0, i8 = 0, i9 = 0, i10 = 0, i11 = 0, i12 = 0, i13 = 0, i1…
5812 i6 = i4 + 60 | 0;
5853 i67 = HEAP32[i6 >> 2] | 0;
6945 HEAP32[i6 >> 2] = i63;
6952 i63 = HEAP32[i6 >> 2] | 0;
7438 HEAP32[i6 >> 2] = i63;
7461 HEAP32[i6 >> 2] = i63;
7500 …HEAP32[i2 + 44 >> 2] = ((HEAP32[i7 >> 2] | 0) != 0 ? 64 : 0) + (HEAP32[i6 >> 2] | 0) + ((i4 | 0) =…
7507 …var i1 = 0, i2 = 0, i3 = 0, i4 = 0, i5 = 0, i6 = 0, i7 = 0, i8 = 0, i9 = 0, i10 = 0, i11 = 0, i13 …
7520 i6 = (i21 & 1 ^ 1) + i20 | 0;
[all …]
Dfannkuch.js5744 …var i1 = 0, i2 = 0, i3 = 0, i4 = 0, i5 = 0, i6 = 0, i7 = 0, i8 = 0, i9 = 0, i10 = 0, i11 = 0, i13 …
5757 i6 = (i21 & 1 ^ 1) + i20 | 0;
5758 i5 = i6 << 1;
5778 HEAP32[14] = i18 & ~(1 << i6);
5781 i32 = i6 << 3;
5796 i6 = i7 >>> 5 & 8;
5797 i7 = i7 >>> i6;
5803 i3 = (i6 | i2 | i5 | i4 | i3) + (i7 >>> i3) | 0;
5809 i6 = HEAP32[i2 >> 2] | 0;
5811 if ((i4 | 0) != (i6 | 0)) {
[all …]
Dfasta.js5920 …var i1 = 0, i2 = 0, i3 = 0, i4 = 0, i5 = 0, i6 = 0, i7 = 0, i8 = 0, i9 = 0, i10 = 0, i11 = 0, i13 …
5933 i6 = (i21 & 1 ^ 1) + i20 | 0;
5934 i5 = i6 << 1;
5954 HEAP32[146] = i18 & ~(1 << i6);
5957 i32 = i6 << 3;
5972 i6 = i7 >>> 5 & 8;
5973 i7 = i7 >>> i6;
5979 i3 = (i6 | i2 | i5 | i4 | i3) + (i7 >>> i3) | 0;
5985 i6 = HEAP32[i2 >> 2] | 0;
5987 if ((i4 | 0) != (i6 | 0)) {
[all …]
Dmemops.js5689 …var i1 = 0, i2 = 0, i3 = 0, i4 = 0, i5 = 0, i6 = 0, i7 = 0, i8 = 0, i9 = 0, i10 = 0, i11 = 0, i13 …
5702 i6 = (i21 & 1 ^ 1) + i20 | 0;
5703 i5 = i6 << 1;
5723 HEAP32[10] = i18 & ~(1 << i6);
5726 i32 = i6 << 3;
5741 i6 = i7 >>> 5 & 8;
5742 i7 = i7 >>> i6;
5748 i3 = (i6 | i2 | i5 | i4 | i3) + (i7 >>> i3) | 0;
5754 i6 = HEAP32[i2 >> 2] | 0;
5756 if ((i4 | 0) != (i6 | 0)) {
[all …]
/external/v8/test/mjsunit/compiler/
Dregress-177883.js68 …var i3 = 0, i4 = 0, i5 = 0, i6 = 0, i7 = 0, i8 = 0, i9 = 0, i10 = 0, i11 = 0, i12 = 0, i13 = 0, i1…
74 i6 = i4 + 4 | 0;
75 HEAPF32[i6 >> 2] = 0.0;
94 HEAPF32[i6 >> 2] = d17;
99 HEAPF32[i6 >> 2] = +HEAPF32[i12 >> 2];
106 HEAPF32[i6 >> 2] = d18;
113 HEAPF32[i6 >> 2] = d17;
120 HEAPF32[i6 >> 2] = d18;
125 HEAPF32[i6 >> 2] = +HEAPF32[i10 >> 2];
132 HEAPF32[i6 >> 2] = d17;
[all …]
/external/llvm/test/MC/Sparc/
Dsparcv9-instructions.s115 ! V8-NEXT: wrpr %g6,%i6,%tpc
117 wrpr %g6,%i6,%tpc
119 ! V8-NEXT: wrpr %g6,%i6,%tnpc
121 wrpr %g6,%i6,%tnpc
123 ! V8-NEXT: wrpr %g6,%i6,%tstate
125 wrpr %g6,%i6,%tstate
127 ! V8-NEXT: wrpr %g6,%i6,%tt
129 wrpr %g6,%i6,%tt
131 ! V8-NEXT: wrpr %g6,%i6,%tick
133 wrpr %g6,%i6,%tick
[all …]
/external/clang/test/CodeGen/
Darm64-arguments.c297 int f38_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, in f38_stack() argument
308 return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; in f38_stack()
350 int f39_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, in f39_stack() argument
361 return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; in f39_stack()
405 int f40_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, in f40_stack() argument
416 return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; in f40_stack()
460 int f41_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, in f41_stack() argument
471 return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; in f41_stack()
517 int f42_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, in f42_stack() argument
524 return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; in f42_stack()
[all …]
/external/llvm/test/CodeGen/X86/
D2010-02-03-DualUndef.ll13 bb3.i: ; preds = %bb5.i6, %bb.nph.i
15 br i1 undef, label %bb4.i, label %bb5.i6
18 br label %bb5.i6
20 bb5.i6: ; preds = %bb4.i, %bb3.i
25 bb7.i: ; preds = %bb5.i6, %bb.i1
D2010-03-05-ConstantFoldCFG.ll32 br i1 undef, label %bb5.i, label %bb7.i6
34 bb7.i6: ; preds = %bb5.i
37 bb9.i: ; preds = %bb7.i6
40 _ZSt21__unguarded_partitionIPdd17less_than_functorET_S2_S2_T0_T1_.exit: ; preds = %bb7.i6
/external/llvm/test/CodeGen/PowerPC/
Dstdux-constuse.ll16 %i0 = phi i64* [ %p1, %for.cond2.preheader ], [ %i6, %for.body4 ]
17 %i6 = getelementptr i64, i64* %i0, i64 400000
18 %i7 = getelementptr i64, i64* %i6, i64 300000
19 %i8 = getelementptr i64, i64* %i6, i64 200000
20 %i9 = getelementptr i64, i64* %i6, i64 100000
21 store i64 %add, i64* %i6, align 32
/external/llvm/test/CodeGen/SPARC/
D64spill.ll13 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
24 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
35 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
47 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
58 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
69 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
80 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
91 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
102 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
113 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
/external/llvm/test/CodeGen/ARM/
D2010-09-21-OptCmpBug.ll25 switch i32 %type, label %bb3.i6.i [
28 i32 6656, label %bb9.i.i6
31 bb9.i.i6: ; preds = %bb19
34 bb3.i6.i: ; preds = %bb19
37 bb1.i13: ; preds = %bb9.i.i6, %bb19, %bb19
/external/llvm/test/CodeGen/AMDGPU/
Dsi-vector-hang.ll49 %arrayidx10.i.i6 = getelementptr inbounds i8, i8 addrspace(1)* %in1, i64 3
50 %22 = load i8, i8 addrspace(1)* %arrayidx10.i.i6, align 1
76 %arrayidx2.i6.i.i = getelementptr inbounds i8, i8 addrspace(1)* %out, i64 3
77 store i8 %35, i8 addrspace(1)* %arrayidx2.i6.i.i, align 1
82 %arrayidx2.i.i6.i = getelementptr inbounds i8, i8 addrspace(1)* %out, i64 5
83 store i8 %37, i8 addrspace(1)* %arrayidx2.i.i6.i, align 1
88 %arrayidx2.i6.i8.i = getelementptr inbounds i8, i8 addrspace(1)* %out, i64 7
89 store i8 %39, i8 addrspace(1)* %arrayidx2.i6.i8.i, align 1
/external/llvm/test/Analysis/ScalarEvolution/
Davoid-infinite-recursion-0.ll18 %i.0.i6 = phi i32 [ %8, %bb4.i ], [ 0, %entry ] ; <i32> [#uses=2]
19 %5 = sub i32 %4, %i.0.i6 ; <i32> [#uses=1]
22 %8 = add i32 %i.0.i6, 1 ; <i32> [#uses=2]
/external/clang/test/Sema/
Dtentative-decls.c52 extern int i6; // expected-note {{previous declaration is here}} in func()
53 static int i6; // expected-error{{static declaration of 'i6' follows non-static declaration}} in func() local
/external/libvpx/libvpx/vp8/encoder/arm/armv6/
Dvp8_short_fdct4x4_armv6.asm49 ldrd r8, r9, [r0] ; [i5 | i4] [i7 | i6]
57 ror r9, r9, #16 ; [i6 | i7]
59 qadd16 r6, r8, r9 ; [i5+i6 | i4+i7] = [b1 | a1] without shift
60 qsub16 r7, r8, r9 ; [i5-i6 | i4-i7] = [c1 | d1] without shift
68 smuad r9, r6, lr ; o4 = (i5+i6)*8 + (i4+i7)*8
69 smusd r8, r6, lr ; o6 = (i5+i6)*8 - (i4+i7)*8
186 ldr r9, [r1, #12] ; [i7 | i6]
192 qadd16 r5, r9, r2 ; b1 = [i7+i11 | i6+i10]
196 qsub16 r6, r9, r2 ; c1 = [i7-i11 | i6-i10]
/external/lzma/CPP/Common/
DMyCom.h221 #define MY_UNKNOWN_IMP6(i1, i2, i3, i4, i5, i6) MY_UNKNOWN_IMP_SPEC( \ argument
228 MY_QUERYINTERFACE_ENTRY(i6) \
231 #define MY_UNKNOWN_IMP7(i1, i2, i3, i4, i5, i6, i7) MY_UNKNOWN_IMP_SPEC( \ argument
238 MY_QUERYINTERFACE_ENTRY(i6) \

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