/external/llvm/lib/Target/Mips/ |
D | MipsTargetMachine.cpp | 49 bool isLittle) { in computeDataLayout() argument 54 if (isLittle) in computeDataLayout() 89 CodeGenOpt::Level OL, bool isLittle) in MipsTargetMachine() argument 90 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, in MipsTargetMachine() 92 isLittle(isLittle), TLOF(make_unique<MipsTargetObjectFile>()), in MipsTargetMachine() 94 Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, *this), in MipsTargetMachine() 96 isLittle, *this), in MipsTargetMachine() 98 isLittle, *this) { in MipsTargetMachine() 159 I = llvm::make_unique<MipsSubtarget>(TargetTriple, CPU, FS, isLittle, in getSubtargetImpl()
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D | MipsTargetMachine.h | 30 bool isLittle; variable 44 CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle); 67 bool isLittleEndian() const { return isLittle; } in isLittleEndian()
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D | MipsCallingConv.td | 130 CCIfSubtargetNot<"isLittle()", 166 CCIfSubtargetNot<"isLittle()", 198 CCIfSubtarget<"isLittle()", 200 CCIfSubtargetNot<"isLittle()",
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D | MipsSubtarget.h | 218 bool isLittle() const { return IsLittle; } in isLittle() function
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D | MipsSEFrameLowering.cpp | 302 if (!Subtarget.isLittle()) in expandBuildPairF64() 350 int64_t Offset = 4 * (Subtarget.isLittle() ? N : (1 - N)); in expandExtractElementF64() 445 if (!STI.isLittle()) in emitPrologue() 461 if (!STI.isLittle()) in emitPrologue()
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D | MipsISelLowering.cpp | 1243 if (Subtarget.isLittle()) { in emitAtomicBinaryPartword() 1488 if (Subtarget.isLittle()) { in emitAtomicCmpSwapPartword() 1904 if (!Subtarget.isLittle() && ArgSizeInBytes < ArgSlotSizeInBytes) { in lowerVAARG() 2194 bool IsLittle = Subtarget.isLittle(); in lowerLOAD() 2315 return lowerUnalignedIntStore(SD, DAG, Subtarget.isLittle()); in lowerSTORE() 2383 if (ArgFlags.isInReg() && !Subtarget.isLittle()) { in CC_MipsO32() 2658 FirstByValReg, LastByValReg, Flags, Subtarget.isLittle(), in LowerCall() 2679 if (!Subtarget.isLittle()) in LowerCall() 3025 if (!Subtarget.isLittle()) in LowerFormalArguments() 3695 unsigned LastReg, const ISD::ArgFlagsTy &Flags, bool isLittle, in passByValArg() argument [all …]
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D | MipsAsmPrinter.cpp | 504 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum; in PrintAsmOperand() 507 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1; in PrintAsmOperand()
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D | MipsSEISelDAGToDAG.cpp | 496 MinSizeInBits, !Subtarget->isLittle())) in selectVSplat() 897 !Subtarget->isLittle())) in selectNode()
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D | MipsSEISelLowering.cpp | 682 bool IsLittleEndian = !Subtarget.isLittle(); in performORCombine() 863 EltSize, !Subtarget.isLittle()) || in performDSPShiftCombine() 1233 if (!Subtarget.isLittle()) in lowerLOAD() 1256 if (!Subtarget.isLittle()) in lowerSTORE() 1641 !Subtarget.isLittle()); in lowerINTRINSIC_WO_CHAIN() 1677 !Subtarget.isLittle()); in lowerINTRINSIC_WO_CHAIN() 2357 !Subtarget.isLittle()) && SplatBitSize <= 64) { in lowerBUILD_VECTOR()
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D | MipsISelLowering.h | 472 const ISD::ArgFlagsTy &Flags, bool isLittle,
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D | MipsFastISel.cpp | 1186 if (ArgSize < 8 && !Subtarget->isLittle()) in processCallArgs()
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D | MipsInstrInfo.td | 210 def IsLE : Predicate<"Subtarget->isLittle()">; 211 def IsBE : Predicate<"!Subtarget->isLittle()">;
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/external/llvm/lib/Target/ARM/ |
D | ARMTargetMachine.cpp | 123 bool isLittle) { in computeDataLayout() argument 127 if (isLittle) in computeDataLayout() 180 CodeGenOpt::Level OL, bool isLittle) in ARMBaseTargetMachine() argument 181 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, in ARMBaseTargetMachine() 185 Subtarget(TT, CPU, FS, *this, isLittle), isLittle(isLittle) { in ARMBaseTargetMachine() 235 I = llvm::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle); in getSubtargetImpl() 252 CodeGenOpt::Level OL, bool isLittle) in ARMTargetMachine() argument 253 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, isLittle) { in ARMTargetMachine() 284 CodeGenOpt::Level OL, bool isLittle) in ThumbTargetMachine() argument 285 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, isLittle) { in ThumbTargetMachine()
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D | ARMTargetMachine.h | 36 bool isLittle; variable 43 CodeGenOpt::Level OL, bool isLittle); 48 bool isLittleEndian() const { return isLittle; } in isLittleEndian() 68 CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle); 103 bool isLittle);
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D | ARMSubtarget.h | 454 bool isLittle() const { return IsLittle; } in isLittle() function
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D | ARMISelLowering.cpp | 1463 if (!Subtarget->isLittle()) in LowerCallResult() 1480 if (!Subtarget->isLittle()) in LowerCallResult() 1534 unsigned id = Subtarget->isLittle() ? 0 : 1; in PassF64ArgInRegs() 2281 bool isLittleEndian = Subtarget->isLittle(); in LowerReturn() 2968 if (!Subtarget->isLittle()) in GetF64FormalArgument() 10660 if (Subtarget->hasNEON() && (AllowsUnaligned || Subtarget->isLittle())) { in allowsMisalignedMemoryAccesses() 12016 if (!Subtarget->isLittle()) in emitLoadLinked() 12058 if (!Subtarget->isLittle()) in emitStoreConditional()
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMAsmBackendELF.h | 23 return createARMELFObjectWriter(OS, OSABI, isLittle()); in createObjectWriter()
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D | ARMAsmBackend.h | 75 bool isLittle() const { return IsLittleEndian; } in isLittle() function
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D | ARMAsmBackend.cpp | 1049 bool isLittle) { in createARMAsmBackend() argument 1063 return new ARMAsmBackendELF(T, TheTriple, OSABI, isLittle); in createARMAsmBackend()
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/external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
D | PPCAsmBackend.cpp | 79 PPCAsmBackend(const Target &T, bool isLittle) : MCAsmBackend(), TheTarget(T), in PPCAsmBackend() argument 80 IsLittleEndian(isLittle) {} in PPCAsmBackend()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64TargetMachine.h | 49 bool isLittle;
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D | AArch64TargetMachine.cpp | 134 isLittle(LittleEndian) { in AArch64TargetMachine() 159 isLittle); in getSubtargetImpl()
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/external/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 551 bool isLittle() const { return IsLittleEndian; } in isLittle() function in __anon5de389750211::MipsAsmParser 3084 if (isLittle()) { in expandUlh() 3155 if (isLittle()) { in expandUlw()
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