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Searched refs:isLittle (Results 1 – 23 of 23) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsTargetMachine.cpp49 bool isLittle) { in computeDataLayout() argument
54 if (isLittle) in computeDataLayout()
89 CodeGenOpt::Level OL, bool isLittle) in MipsTargetMachine() argument
90 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, in MipsTargetMachine()
92 isLittle(isLittle), TLOF(make_unique<MipsTargetObjectFile>()), in MipsTargetMachine()
94 Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, *this), in MipsTargetMachine()
96 isLittle, *this), in MipsTargetMachine()
98 isLittle, *this) { in MipsTargetMachine()
159 I = llvm::make_unique<MipsSubtarget>(TargetTriple, CPU, FS, isLittle, in getSubtargetImpl()
DMipsTargetMachine.h30 bool isLittle; variable
44 CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
67 bool isLittleEndian() const { return isLittle; } in isLittleEndian()
DMipsCallingConv.td130 CCIfSubtargetNot<"isLittle()",
166 CCIfSubtargetNot<"isLittle()",
198 CCIfSubtarget<"isLittle()",
200 CCIfSubtargetNot<"isLittle()",
DMipsSubtarget.h218 bool isLittle() const { return IsLittle; } in isLittle() function
DMipsSEFrameLowering.cpp302 if (!Subtarget.isLittle()) in expandBuildPairF64()
350 int64_t Offset = 4 * (Subtarget.isLittle() ? N : (1 - N)); in expandExtractElementF64()
445 if (!STI.isLittle()) in emitPrologue()
461 if (!STI.isLittle()) in emitPrologue()
DMipsISelLowering.cpp1243 if (Subtarget.isLittle()) { in emitAtomicBinaryPartword()
1488 if (Subtarget.isLittle()) { in emitAtomicCmpSwapPartword()
1904 if (!Subtarget.isLittle() && ArgSizeInBytes < ArgSlotSizeInBytes) { in lowerVAARG()
2194 bool IsLittle = Subtarget.isLittle(); in lowerLOAD()
2315 return lowerUnalignedIntStore(SD, DAG, Subtarget.isLittle()); in lowerSTORE()
2383 if (ArgFlags.isInReg() && !Subtarget.isLittle()) { in CC_MipsO32()
2658 FirstByValReg, LastByValReg, Flags, Subtarget.isLittle(), in LowerCall()
2679 if (!Subtarget.isLittle()) in LowerCall()
3025 if (!Subtarget.isLittle()) in LowerFormalArguments()
3695 unsigned LastReg, const ISD::ArgFlagsTy &Flags, bool isLittle, in passByValArg() argument
[all …]
DMipsAsmPrinter.cpp504 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum; in PrintAsmOperand()
507 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1; in PrintAsmOperand()
DMipsSEISelDAGToDAG.cpp496 MinSizeInBits, !Subtarget->isLittle())) in selectVSplat()
897 !Subtarget->isLittle())) in selectNode()
DMipsSEISelLowering.cpp682 bool IsLittleEndian = !Subtarget.isLittle(); in performORCombine()
863 EltSize, !Subtarget.isLittle()) || in performDSPShiftCombine()
1233 if (!Subtarget.isLittle()) in lowerLOAD()
1256 if (!Subtarget.isLittle()) in lowerSTORE()
1641 !Subtarget.isLittle()); in lowerINTRINSIC_WO_CHAIN()
1677 !Subtarget.isLittle()); in lowerINTRINSIC_WO_CHAIN()
2357 !Subtarget.isLittle()) && SplatBitSize <= 64) { in lowerBUILD_VECTOR()
DMipsISelLowering.h472 const ISD::ArgFlagsTy &Flags, bool isLittle,
DMipsFastISel.cpp1186 if (ArgSize < 8 && !Subtarget->isLittle()) in processCallArgs()
DMipsInstrInfo.td210 def IsLE : Predicate<"Subtarget->isLittle()">;
211 def IsBE : Predicate<"!Subtarget->isLittle()">;
/external/llvm/lib/Target/ARM/
DARMTargetMachine.cpp123 bool isLittle) { in computeDataLayout() argument
127 if (isLittle) in computeDataLayout()
180 CodeGenOpt::Level OL, bool isLittle) in ARMBaseTargetMachine() argument
181 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, in ARMBaseTargetMachine()
185 Subtarget(TT, CPU, FS, *this, isLittle), isLittle(isLittle) { in ARMBaseTargetMachine()
235 I = llvm::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle); in getSubtargetImpl()
252 CodeGenOpt::Level OL, bool isLittle) in ARMTargetMachine() argument
253 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, isLittle) { in ARMTargetMachine()
284 CodeGenOpt::Level OL, bool isLittle) in ThumbTargetMachine() argument
285 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, isLittle) { in ThumbTargetMachine()
DARMTargetMachine.h36 bool isLittle; variable
43 CodeGenOpt::Level OL, bool isLittle);
48 bool isLittleEndian() const { return isLittle; } in isLittleEndian()
68 CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
103 bool isLittle);
DARMSubtarget.h454 bool isLittle() const { return IsLittle; } in isLittle() function
DARMISelLowering.cpp1463 if (!Subtarget->isLittle()) in LowerCallResult()
1480 if (!Subtarget->isLittle()) in LowerCallResult()
1534 unsigned id = Subtarget->isLittle() ? 0 : 1; in PassF64ArgInRegs()
2281 bool isLittleEndian = Subtarget->isLittle(); in LowerReturn()
2968 if (!Subtarget->isLittle()) in GetF64FormalArgument()
10660 if (Subtarget->hasNEON() && (AllowsUnaligned || Subtarget->isLittle())) { in allowsMisalignedMemoryAccesses()
12016 if (!Subtarget->isLittle()) in emitLoadLinked()
12058 if (!Subtarget->isLittle()) in emitStoreConditional()
/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMAsmBackendELF.h23 return createARMELFObjectWriter(OS, OSABI, isLittle()); in createObjectWriter()
DARMAsmBackend.h75 bool isLittle() const { return IsLittleEndian; } in isLittle() function
DARMAsmBackend.cpp1049 bool isLittle) { in createARMAsmBackend() argument
1063 return new ARMAsmBackendELF(T, TheTriple, OSABI, isLittle); in createARMAsmBackend()
/external/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCAsmBackend.cpp79 PPCAsmBackend(const Target &T, bool isLittle) : MCAsmBackend(), TheTarget(T), in PPCAsmBackend() argument
80 IsLittleEndian(isLittle) {} in PPCAsmBackend()
/external/llvm/lib/Target/AArch64/
DAArch64TargetMachine.h49 bool isLittle;
DAArch64TargetMachine.cpp134 isLittle(LittleEndian) { in AArch64TargetMachine()
159 isLittle); in getSubtargetImpl()
/external/llvm/lib/Target/Mips/AsmParser/
DMipsAsmParser.cpp551 bool isLittle() const { return IsLittleEndian; } in isLittle() function in __anon5de389750211::MipsAsmParser
3084 if (isLittle()) { in expandUlh()
3155 if (isLittle()) { in expandUlw()