| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | brw_blorp.cpp | 129 uint32_t mask_x, mask_y; in compute_tile_offsets() local
131 intel_region_get_tile_masks(region, &mask_x, &mask_y, in compute_tile_offsets()
135 *tile_y = y_offset & mask_y; in compute_tile_offsets()
138 y_offset & ~mask_y, in compute_tile_offsets()
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| D | intel_regions.c | 407 uint32_t *mask_x, uint32_t *mask_y, in intel_region_get_tile_masks() argument
420 *mask_x = *mask_y = 0; in intel_region_get_tile_masks()
424 *mask_y = 7; in intel_region_get_tile_masks()
428 *mask_y = 31; in intel_region_get_tile_masks()
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| D | intel_fbo.c | 582 uint32_t mask_x, mask_y; in intel_renderbuffer_tile_offsets() local
584 intel_region_get_tile_masks(region, &mask_x, &mask_y, false); in intel_renderbuffer_tile_offsets()
587 *tile_y = irb->draw_y & mask_y; in intel_renderbuffer_tile_offsets()
589 irb->draw_y & ~mask_y, false); in intel_renderbuffer_tile_offsets()
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| D | intel_screen.c | 524 uint32_t mask_x, mask_y; in intel_from_planar() local
568 intel_region_get_tile_masks(image->region, &mask_x, &mask_y, false); in intel_from_planar()
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| /external/mesa3d/src/mesa/drivers/dri/intel/ |
| D | intel_regions.c | 407 uint32_t *mask_x, uint32_t *mask_y, in intel_region_get_tile_masks() argument
420 *mask_x = *mask_y = 0; in intel_region_get_tile_masks()
424 *mask_y = 7; in intel_region_get_tile_masks()
428 *mask_y = 31; in intel_region_get_tile_masks()
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| D | intel_fbo.c | 582 uint32_t mask_x, mask_y; in intel_renderbuffer_tile_offsets() local
584 intel_region_get_tile_masks(region, &mask_x, &mask_y, false); in intel_renderbuffer_tile_offsets()
587 *tile_y = irb->draw_y & mask_y; in intel_renderbuffer_tile_offsets()
589 irb->draw_y & ~mask_y, false); in intel_renderbuffer_tile_offsets()
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| D | intel_regions.h | 138 uint32_t *mask_x, uint32_t *mask_y,
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| D | intel_screen.c | 524 uint32_t mask_x, mask_y; in intel_from_planar() local
568 intel_region_get_tile_masks(image->region, &mask_x, &mask_y, false); in intel_from_planar()
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| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| D | intel_regions.c | 407 uint32_t *mask_x, uint32_t *mask_y, in intel_region_get_tile_masks() argument
420 *mask_x = *mask_y = 0; in intel_region_get_tile_masks()
424 *mask_y = 7; in intel_region_get_tile_masks()
428 *mask_y = 31; in intel_region_get_tile_masks()
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| D | intel_fbo.c | 582 uint32_t mask_x, mask_y; in intel_renderbuffer_tile_offsets() local
584 intel_region_get_tile_masks(region, &mask_x, &mask_y, false); in intel_renderbuffer_tile_offsets()
587 *tile_y = irb->draw_y & mask_y; in intel_renderbuffer_tile_offsets()
589 irb->draw_y & ~mask_y, false); in intel_renderbuffer_tile_offsets()
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| D | intel_screen.c | 524 uint32_t mask_x, mask_y; in intel_from_planar() local
568 intel_region_get_tile_masks(image->region, &mask_x, &mask_y, false); in intel_from_planar()
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| /external/libvpx/libvpx/vp9/common/ |
| D | vp9_loopfilter.c | 856 const uint64_t mask_y = (((uint64_t) 1 << (rows << 3)) - 1); in vp9_adjust_mask() local
861 lfm->left_y[i] &= mask_y; in vp9_adjust_mask()
862 lfm->above_y[i] &= mask_y; in vp9_adjust_mask()
866 lfm->int_4x4_y &= mask_y; in vp9_adjust_mask()
886 const uint64_t mask_y = (((1 << columns) - 1)) * 0x0101010101010101ULL; in vp9_adjust_mask() local
895 lfm->left_y[i] &= mask_y; in vp9_adjust_mask()
896 lfm->above_y[i] &= mask_y; in vp9_adjust_mask()
900 lfm->int_4x4_y &= mask_y; in vp9_adjust_mask()
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