Home
last modified time | relevance | path

Searched refs:r20 (Results 1 – 25 of 49) sorted by relevance

12

/external/strace/linux/alpha/
Darch_getrval2.c4 long r20; in getrval2() local
5 if (upeek(tcp->pid, 20, &r20) < 0) in getrval2()
7 return r20; in getrval2()
/external/llvm/test/MC/Hexagon/
Dnew-value-check.s11 if (!p3) memb(r20) = r0.new
40 if (p2) memb(r20) = r0.new
47 memb(r20) = r0.new
57 if (p2) memb(r20) = r0.new
63 if (p3) memb(r20) = r0.new
70 if (p0) memb(r20) = r0.new
DasmMap.s32 #CHECK: 455dc014 { if (!p0) r20 = memh(r29{{ *}}+{{ *}}#0)
33 if (!p0) r20=memh(r29)
110 #CHECK: 4488d401 { if (!p1) memw(r8{{ *}}+{{ *}}#0) = r20
111 if (!p1) memw(r8)=r20
173 #CHECK: a10fd400 { memb(r15{{ *}}+{{ *}}#0) = r20
174 memb(r15)=r20
194 #CHECK: 3f34c07b { memh(r20{{ *}}+{{ *}}#0) = setbit(#27)
195 memh(r20)=setbit(#27)
281 #CHECK: 4754c81c if (!p1.new) r28 = memh(r20{{ *}}+{{ *}}#0)
284 if (!p1.new) r28=memh(r20)
[all …]
Dv60-vmpy-acc.s56 #CHECK: 1934fc62 { v2.w += vdmpy(v28.h,r20.h):sat }
57 v2.w += vdmpy(v28.h,r20.h):sat
Dv60-vmem.s287 #CHECK: 2814e12a v10.cur = vmem(r20+#-7) }
290 v10.cur=vmem(r20+#-7)
/external/libunwind/src/ia64/
DGinstall_cursor.S74 ld8 r20 = [r3], 2*LOC_SIZE // r20 = loc[IA64_REG_FR20]
89 and r20 = -4, r20
96 ldf.fill f20 = [r20] // f20 restored (don't touch no more)
174 ld8 r20 = [r2], (F3_LOC_OFF - B5_LOC_OFF) // r20 = b5_loc
190 and r20 = -4, r20
201 ld8 r20 = [r20] // r20 = *b5_loc
229 mov b5 = r20 // b5 restored (don't touch no more)
Ducontext_i.h57 #define rB3 r20
/external/clang/test/CXX/except/except.spec/
Dp3.cpp90 extern void (*r20)() throw(); // expected-note {{previous declaration}}
91 extern void (*r20)() noexcept(false); // expected-error {{does not match}}
/external/libunwind/src/hppa/
DGresume.c40 register unsigned long r20 __asm__ ("r20") = SYS_rt_sigreturn; in my_rt_sigreturn()
46 : "r"(new_sp), "r"(r20), "r"(r25) in my_rt_sigreturn()
/external/boringssl/src/crypto/poly1305/
Dpoly1305_vec.c196 uint64_t r20, r21, r22, s22; in poly1305_first_block() local
211 r20 = r0; in poly1305_first_block()
217 d[0] = add128(mul64x64_128(r20, r20), mul64x64_128(r21 * 2, s22)); in poly1305_first_block()
218 d[1] = add128(mul64x64_128(r22, s22), mul64x64_128(r20 * 2, r21)); in poly1305_first_block()
219 d[2] = add128(mul64x64_128(r21, r21), mul64x64_128(r22 * 2, r20)); in poly1305_first_block()
221 r20 = lo128(d[0]) & 0xfffffffffff; in poly1305_first_block()
229 r20 += c * 5; in poly1305_first_block()
230 c = (r20 >> 44); in poly1305_first_block()
231 r20 = r20 & 0xfffffffffff; in poly1305_first_block()
234 p->R20.v = _mm_shuffle_epi32(_mm_cvtsi32_si128((uint32_t)(r20)&0x3ffffff), in poly1305_first_block()
[all …]
/external/eigen/test/eigen2/
Druntest.sh13 if ! ./test_$1 r20 > /dev/null 2> .runtest.log ; then
/external/llvm/test/CodeGen/PowerPC/
Dr31.ll6 …r8},~{r9},~{r10},~{r11},~{r12},~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r21},~{r22},~{r2…
Daantidep-def-ec.mir58 '%r17', '%r18', '%r19', '%r20', '%r21', '%r22',
/external/compiler-rt/lib/tsan/rtl/
Dtsan_ppc_regs.h21 #define r20 20 macro
Dtsan_rtl_ppc64.S77 std r20,72(r3)
222 std r20,72(r3)
/external/boringssl/src/crypto/aes/asm/
Daes-x86_64.pl465 { my ($t3,$r20,$r21)=($acc2,"%r8d","%r9d");
475 lea ($s0,$s0),$r20
480 and \$0xfefefefe,$r20
486 xor $acc0,$r20
489 xor $r20,$s0
497 xor $r20,$s0
503 lea ($s2,$s2),$r20
516 and \$0xfefefefe,$r20
522 xor $acc0,$r20
526 xor $r20,$s2
[all …]
/external/llvm/test/MC/PowerPC/
Dppc64-regs.s25 #CHECK: .cfi_offset r20, 160
142 .cfi_offset r20,160
/external/valgrind/VEX/auxprogs/
Dgenoffsets.c215 GENOFFSET(MIPS32,mips32,r20); in foo()
252 GENOFFSET(MIPS64,mips64,r20); in foo()
289 GENOFFSET(TILEGX,tilegx,r20); in foo()
/external/mesa3d/src/gallium/drivers/radeon/
DAMDILISelLowering.cpp725 SDValue r20 = DAG.getNode(ISD::UREM, DL, OVT, r0, r1); in LowerSREM32() local
728 r20 = DAG.getNode(AMDGPUISD::UMUL, DL, OVT, r20, r1); in LowerSREM32()
731 r0 = DAG.getNode(ISD::SUB, DL, OVT, r0, r20); in LowerSREM32()
DAMDILRegisterInfo.td42 def R20 : AMDILReg<20, "r20">, DwarfRegNum<[20]>;
/external/llvm/lib/Target/AVR/
DAVRRegisterInfo.td65 def R20 : AVRReg<20, "r20">, DwarfRegNum<[20]>;
96 def R21R20 : AVRReg<20, "r21:r20", [R20, R21]>, DwarfRegNum<[20]>;
/external/llvm/test/CodeGen/AArch64/
Dghc-cc.ll6 @sp = external global i64 ; assigned to register: r20
/external/libunwind/tests/
Dia64-test-stack-asm.S108 ld8 r20 = [r3], (SAVED_BSPSTORE_OFF-SAVED_BSP_OFF);; // saved bsp
/external/antlr/antlr-3.4/runtime/Python/tests/
Dt042ast.g102 r20
/external/llvm/test/CodeGen/Mips/msa/
Dspill.ll95 %r20 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r19, <16 x i8> %20)
96 %r21 = call <16 x i8> @llvm.mips.addv.b(<16 x i8> %r20, <16 x i8> %21)
244 %r20 = call <8 x i16> @llvm.mips.addv.h(<8 x i16> %r19, <8 x i16> %20)
245 %r21 = call <8 x i16> @llvm.mips.addv.h(<8 x i16> %r20, <8 x i16> %21)
393 %r20 = call <4 x i32> @llvm.mips.addv.w(<4 x i32> %r19, <4 x i32> %20)
394 %r21 = call <4 x i32> @llvm.mips.addv.w(<4 x i32> %r20, <4 x i32> %21)
542 %r20 = call <2 x i64> @llvm.mips.addv.d(<2 x i64> %r19, <2 x i64> %20)
543 %r21 = call <2 x i64> @llvm.mips.addv.d(<2 x i64> %r20, <2 x i64> %21)

12