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Searched refs:res6 (Results 1 – 25 of 29) sorted by relevance

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/external/libvpx/libvpx/vpx_dsp/mips/
Didct16x16_msa.c267 v8i16 vec, res0, res1, res2, res3, res4, res5, res6, res7; in vpx_idct16x16_1_add_msa() local
280 UNPCK_UB_SH(dst2, res2, res6); in vpx_idct16x16_1_add_msa()
283 ADD4(res4, vec, res5, vec, res6, vec, res7, vec, res4, res5, res6, res7); in vpx_idct16x16_1_add_msa()
285 CLIP_SH4_0_255(res4, res5, res6, res7); in vpx_idct16x16_1_add_msa()
286 PCKEV_B4_UB(res4, res0, res5, res1, res6, res2, res7, res3, in vpx_idct16x16_1_add_msa()
332 v8i16 res0, res1, res2, res3, res4, res5, res6, res7; in vpx_iadst16_1d_columns_addblk_msa() local
446 ILVR_B2_SH(zero, dst6, zero, dst7, res6, res7); in vpx_iadst16_1d_columns_addblk_msa()
447 ADD2(res6, out6, res7, out7, res6, res7); in vpx_iadst16_1d_columns_addblk_msa()
448 CLIP_SH2_0_255(res6, res7); in vpx_iadst16_1d_columns_addblk_msa()
449 PCKEV_B2_SH(res6, res6, res7, res7, res6, res7); in vpx_iadst16_1d_columns_addblk_msa()
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Dvpx_convolve8_avg_horiz_msa.c509 v8u16 res0, res1, res2, res3, res4, res5, res6, res7, filt; in common_hz_2t_and_aver_dst_16w_msa() local
528 res6, res7); in common_hz_2t_and_aver_dst_16w_msa()
530 SRARI_H4_UH(res4, res5, res6, res7, FILTER_BITS); in common_hz_2t_and_aver_dst_16w_msa()
538 PCKEV_AVG_ST_UB(res7, res6, dst3, dst); in common_hz_2t_and_aver_dst_16w_msa()
553 res6, res7); in common_hz_2t_and_aver_dst_16w_msa()
555 SRARI_H4_UH(res4, res5, res6, res7, FILTER_BITS); in common_hz_2t_and_aver_dst_16w_msa()
563 PCKEV_AVG_ST_UB(res7, res6, dst3, dst); in common_hz_2t_and_aver_dst_16w_msa()
578 v8u16 res0, res1, res2, res3, res4, res5, res6, res7, filt; in common_hz_2t_and_aver_dst_32w_msa() local
605 res6, res7); in common_hz_2t_and_aver_dst_32w_msa()
607 SRARI_H4_UH(res4, res5, res6, res7, FILTER_BITS); in common_hz_2t_and_aver_dst_32w_msa()
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Didct32x32_msa.c711 v8i16 res0, res1, res2, res3, res4, res5, res6, res7, vec; in vpx_idct32x32_1_add_msa() local
725 UNPCK_UB_SH(dst2, res2, res6); in vpx_idct32x32_1_add_msa()
728 ADD4(res4, vec, res5, vec, res6, vec, res7, vec, res4, res5, res6, res7); in vpx_idct32x32_1_add_msa()
730 CLIP_SH4_0_255(res4, res5, res6, res7); in vpx_idct32x32_1_add_msa()
731 PCKEV_B4_UB(res4, res0, res5, res1, res6, res2, res7, res3, in vpx_idct32x32_1_add_msa()
/external/icu/android_icu4j/src/main/tests/android/icu/dev/test/format/
DIntlTestNumberFormatAPI.java91 StringBuffer res6 = new StringBuffer(); in TestAPI() local
112 res6 = cur_fr.format(l, res6, pos4); in TestAPI()
113 logln("" + l + " formatted to " + res6); in TestAPI()
/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/format/
DIntlTestNumberFormatAPI.java87 StringBuffer res6 = new StringBuffer(); in TestAPI() local
108 res6 = cur_fr.format(l, res6, pos4); in TestAPI()
109 logln("" + l + " formatted to " + res6); in TestAPI()
/external/icu/icu4c/source/test/intltest/
Dnmfmapts.cpp122 UnicodeString res1, res2, res3, res4, res5, res6; in testAPI() local
145 res6 = cur_fr->format(fL, res6, pos4, status); in testAPI()
149 logln((UnicodeString) "" + fL.getLong() + " formatted to " + res6); in testAPI()
/external/llvm/test/Bitcode/
DmiscInstructions.3.2.ll90 ; CHECK-NEXT: %res6 = icmp ule i32 %x1, %x2
91 %res6 = icmp ule i32 %x1, %x2
132 ; CHECK-NEXT: %res6 = fcmp ule float %x1, %x2
133 %res6 = fcmp ule float %x1, %x2
DmemInstructions.3.2.ll45 ; CHECK-NEXT: %res6 = load volatile i8, i8* %ptr1, !nontemporal !0
46 %res6 = load volatile i8, i8* %ptr1, !nontemporal !0
101 ; CHECK-NEXT: %res6 = load atomic volatile i8, i8* %ptr1 monotonic, align 1
102 %res6 = load atomic volatile i8, i8* %ptr1 monotonic, align 1
249 ; CHECK-NEXT: %res6 = extractvalue { i32, i1 } [[TMP]], 0
250 %res6 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new acquire acquire
DbinaryFloatInstructions.3.2.ll25 ; CHECK-NEXT: %res6 = fadd ppc_fp128 %x6, %x6
26 %res6 = fadd ppc_fp128 %x6, %x6
DbinaryIntInstructions.3.2.ll25 ; CHECK: %res6 = add nuw i1 %x1, %x1
26 %res6 = add nuw i1 %x1, %x1
/external/llvm/test/CodeGen/AMDGPU/
Dfetch-limits.r600.ll27 %res6 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %6, i32 0, i32 0, i32 1)
33 %d = fadd <4 x float> %res6, %res7
Dllvm.AMDGPU.tex.ll27 %res6 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %res5, i32 0, i32 0, i32 6)
28 %res7 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %res6, i32 0, i32 0, i32 7)
Dllvm.SI.imageload.ll36 %res6 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v6,
53 %t2 = extractelement <4 x i32> %res6, i32 0
54 %t3 = extractelement <4 x i32> %res6, i32 2
Dllvm.SI.resinfo.ll28 %res6 = call <4 x i32> @llvm.SI.resinfo(i32 %a6, <32 x i8> undef, i32 6)
46 %t2 = extractelement <4 x i32> %res6, i32 0
47 %t3 = extractelement <4 x i32> %res6, i32 2
Dllvm.SI.sampled.ll48 %res6 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v6,
77 %t2 = extractelement <4 x float> %res6, i32 0
78 %t3 = extractelement <4 x float> %res6, i32 2
Dllvm.SI.sample.ll48 %res6 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v6,
77 %t2 = extractelement <4 x float> %res6, i32 0
78 %t3 = extractelement <4 x float> %res6, i32 2
Dfetch-limits.r700+.ll44 %res6 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %6, i32 0, i32 0, i32 1)
58 %d = fadd <4 x float> %res6, %res7
/external/clang/test/SemaCXX/
Daltivec.cpp25 int res6[vec_step(vs) == 8 ? 1 : -1]; in test_vec_step() local
/external/libvpx/libvpx/vp9/encoder/x86/
Dvp9_dct_ssse3.c91 __m128i res0, res1, res2, res3, res4, res5, res6, res7; in vp9_fdct8x8_quant_ssse3() local
149 res6 = _mm_packs_epi32(w6, w7); in vp9_fdct8x8_quant_ssse3()
215 const __m128i tr0_5 = _mm_unpacklo_epi16(res6, res7); in vp9_fdct8x8_quant_ssse3()
217 const __m128i tr0_7 = _mm_unpackhi_epi16(res6, res7); in vp9_fdct8x8_quant_ssse3()
/external/llvm/test/CodeGen/ARM/
Dintrinsics-crypto.ll33 %res6 = call <4 x i32> @llvm.arm.neon.sha1su1(<4 x i32> %res5, <4 x i32> %res1)
35 %res7 = call <4 x i32> @llvm.arm.neon.sha256h(<4 x i32> %res6, <4 x i32> %tmp3, <4 x i32> %res1)
/external/clang/test/SemaOpenCL/
Dvec_step.cl21 int res6[vec_step(auto4) == 2 ? 1 : -1];
/external/libevent/
Devutil.c839 struct evutil_addrinfo *res4=NULL, *res6=NULL; in evutil_getaddrinfo_common() local
851 res6 = evutil_new_addrinfo((struct sockaddr*)&sin6, in evutil_getaddrinfo_common()
853 if (!res6) in evutil_getaddrinfo_common()
871 if (res6) in evutil_getaddrinfo_common()
872 evutil_freeaddrinfo(res6); in evutil_getaddrinfo_common()
876 *res = evutil_addrinfo_append(res4, res6); in evutil_getaddrinfo_common()
/external/libvpx/libvpx/vpx_dsp/x86/
Dfwd_txfm_impl_sse2.h310 __m128i res0, res1, res2, res3, res4, res5, res6, res7; in FDCT8x8_2D() local
379 res6 = _mm_packs_epi32(w6, w7); in FDCT8x8_2D()
381 overflow = check_epi16_overflow_x4(&res0, &res4, &res2, &res6); in FDCT8x8_2D()
491 const __m128i tr0_5 = _mm_unpacklo_epi16(res6, res7); in FDCT8x8_2D()
493 const __m128i tr0_7 = _mm_unpackhi_epi16(res6, res7); in FDCT8x8_2D()
/external/clang/test/SemaObjCXX/
Darc-templates.mm135 identity<__autoreleasing id> res6 = accept_any_ref(ai);
155 identity<__autoreleasing A *> res6 = accept_any_ref(ai);
/external/llvm/test/CodeGen/X86/
Davx512bwvl-intrinsics.ll90 %res6 = call i32 @llvm.x86.avx512.mask.cmp.b.256(<32 x i8> %a0, <32 x i8> %a1, i32 6, i32 -1)
91 %vec6 = insertelement <8 x i32> %vec5, i32 %res6, i32 6
119 %res6 = call i32 @llvm.x86.avx512.mask.cmp.b.256(<32 x i8> %a0, <32 x i8> %a1, i32 6, i32 %mask)
120 %vec6 = insertelement <8 x i32> %vec5, i32 %res6, i32 6
150 %res6 = call i32 @llvm.x86.avx512.mask.ucmp.b.256(<32 x i8> %a0, <32 x i8> %a1, i32 6, i32 -1)
151 %vec6 = insertelement <8 x i32> %vec5, i32 %res6, i32 6
179 %res6 = call i32 @llvm.x86.avx512.mask.ucmp.b.256(<32 x i8> %a0, <32 x i8> %a1, i32 6, i32 %mask)
180 %vec6 = insertelement <8 x i32> %vec5, i32 %res6, i32 6
210 %res6 = call i16 @llvm.x86.avx512.mask.cmp.w.256(<16 x i16> %a0, <16 x i16> %a1, i32 6, i16 -1)
211 %vec6 = insertelement <8 x i16> %vec5, i16 %res6, i32 6
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