Home
last modified time | relevance | path

Searched refs:shift1 (Results 1 – 23 of 23) sorted by relevance

/external/owasp/sanitizer/tools/findbugs/bin/
Dfindbugs.bat45 :shift1 label
59 goto shift1
65 goto shift1
71 goto shift1
77 goto shift1
83 goto shift1
89 goto shift1
95 goto shift1
101 goto shift1
107 goto shift1
[all …]
/external/pdfium/core/src/fxcodec/jbig2/
DJBig2_Image.cpp243 FX_DWORD s1 = 0, d1 = 0, d2 = 0, shift = 0, shift1 = 0, shift2 = 0, tmp = 0, in composeTo_opt2() local
354 shift1 = s1 - d1; in composeTo_opt2()
355 shift2 = 32 - shift1; in composeTo_opt2()
357 tmp1 = (JBIG2_GETDWORD(lineSrc) << shift1) | in composeTo_opt2()
387 shift1 = s1 - d1; in composeTo_opt2()
388 shift2 = 32 - shift1; in composeTo_opt2()
394 tmp1 = (JBIG2_GETDWORD(sp) << shift1) | in composeTo_opt2()
422 tmp1 = (JBIG2_GETDWORD(sp) << shift1) | in composeTo_opt2()
451 (JBIG2_GETDWORD(sp) << shift1) | in composeTo_opt2()
568 shift1 = d1 - s1; in composeTo_opt2()
[all …]
/external/webrtc/webrtc/modules/audio_coding/codecs/ilbc/
Ddo_plc.c46 int16_t shift1, shift2, shift3, shiftMax; in WebRtcIlbcfix_DoThePlc() local
108 shift1 = WebRtcSpl_GetSizeInBits(WEBRTC_SPL_ABS_W32(cross_comp))-15; in WebRtcIlbcfix_DoThePlc()
110 (int16_t)WEBRTC_SPL_SHIFT_W32(cross_comp, -shift1) * in WebRtcIlbcfix_DoThePlc()
111 (int16_t)WEBRTC_SPL_SHIFT_W32(cross_comp, -shift1)) >> 15); in WebRtcIlbcfix_DoThePlc()
122 if(((shiftMax<<1)+shift3) > ((shift1<<1)+shift2)) { in WebRtcIlbcfix_DoThePlc()
123 tmp1 = WEBRTC_SPL_MIN(31, (shiftMax<<1)+shift3-(shift1<<1)-shift2); in WebRtcIlbcfix_DoThePlc()
127 tmp2 = WEBRTC_SPL_MIN(31, (shift1<<1)+shift2-(shiftMax<<1)-shift3); in WebRtcIlbcfix_DoThePlc()
135 shiftMax = shift1; in WebRtcIlbcfix_DoThePlc()
/external/llvm/test/CodeGen/ARM/
Dneon_vabs.ll102 %shift1 = ashr <4 x i32> %diff, <i32 31, i32 31, i32 31, i32 31>
103 %add1 = add <4 x i32> %shift1, %diff
104 %res = xor <4 x i32> %shift1, %add1
113 … %shift1 = ashr <8 x i16> %diff,<i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
114 %add1 = add <8 x i16> %shift1, %diff
115 %res = xor <8 x i16> %shift1, %add1
125 %shift1 = ashr <2 x i64> %diff,<i64 63, i64 63>
126 %add1 = add <2 x i64> %shift1, %diff
127 %res = xor <2 x i64> %shift1, %add1
/external/llvm/test/CodeGen/AArch64/
Daddsub-shifted.ll10 %shift1 = shl i32 %rhs1, 18
11 %val1 = add i32 %lhs32, %shift1
78 %shift1 = lshr i32 %rhs32, 18
79 %val1 = add i32 %lhs32, %shift1
137 %shift1 = ashr i32 %rhs32, 18
138 %val1 = add i32 %lhs32, %shift1
196 %shift1 = shl i32 %rhs32, 13
197 %tst1 = icmp uge i32 %lhs32, %shift1
248 %shift1 = shl i32 %rhs32, 13
249 %val1 = sub i32 0, %shift1
Dbitfield.ll86 %shift1 = ashr i32 %val32, 31
87 store volatile i32 %shift1, i32* @var32
/external/llvm/test/CodeGen/X86/
Dshift-i256.ll5 ; CHECK-LABEL: shift1
6 define void @shift1(i256 %x, i256 %a, i256* nocapture %r) nounwind readnone {
/external/llvm/test/Transforms/InstSimplify/
Dexact-nsw-nuw.ll5 ; CHECK-LABEL: @shift1(
7 define i32 @shift1(i32 %A, i32 %B) {
/external/webrtc/webrtc/common_audio/signal_processing/
Dvector_scaling_operations.c121 void WebRtcSpl_ScaleAndAddVectors(const int16_t *in1, int16_t gain1, int shift1, in WebRtcSpl_ScaleAndAddVectors() argument
137 *outptr++ = (int16_t)((gain1 * *in1ptr++) >> shift1) + in WebRtcSpl_ScaleAndAddVectors()
/external/guava/guava-tests/test/com/google/common/cache/
DCacheExpirationTest.java402 int shift1 = 10 + VALUE_PREFIX; in runRemovalScheduler() local
403 loader.setValuePrefix(shift1); in runRemovalScheduler()
406 assertEquals(Integer.valueOf(i + shift1), cache.getUnchecked(keyPrefix + i)); in runRemovalScheduler()
417 int shift2 = shift1 + 10; in runRemovalScheduler()
/external/llvm/test/Transforms/SROA/
Dbig-endian.ll32 ; CHECK-NEXT: %[[shift1:.*]] = shl i24 %[[ext1]], 8
34 ; CHECK-NEXT: %[[insert1:.*]] = or i24 %[[mask1]], %[[shift1]]
52 ; CHECK-NEXT: %[[shift1:.*]] = lshr i24 %[[insert0]], 8
53 ; CHECK-NEXT: %[[trunc1:.*]] = trunc i24 %[[shift1]] to i8
Dbasictest.ll600 ; CHECK-NEXT: %[[shift1:.*]] = shl i24 %[[ext1]], 8
602 ; CHECK-NEXT: %[[insert1:.*]] = or i24 %[[mask1]], %[[shift1]]
618 ; CHECK-NEXT: %[[shift1:.*]] = lshr i24 %[[insert0]], 8
619 ; CHECK-NEXT: %[[trunc1:.*]] = trunc i24 %[[shift1]] to i8
/external/libopus/silk/
DPLC.c175 opus_int lag, idx, sLTP_buf_idx, shift1, shift2; in silk_PLC_conceal() local
212 silk_sum_sqr_shift( &energy1, &shift1, exc_buf, psPLC->subfr_length ); in silk_PLC_conceal()
215 if( silk_RSHIFT( energy1, shift2 ) < silk_RSHIFT( energy2, shift1 ) ) { in silk_PLC_conceal()
/external/libhevc/decoder/arm/
Dihevcd_itrans_recon_dc_luma.s67 mov r6,#64 @ 1 << (shift1 - 1)@
Dihevcd_itrans_recon_dc_chroma.s66 mov r6,#64 @ 1 << (shift1 - 1)@
/external/webrtc/webrtc/modules/audio_processing/aecm/
Daecm_core_mips.c85 int32_t load_ptr, store_ptr1, store_ptr2, shift, shift1; in WindowAndFFT() local
149 [hann1] "=&r" (hann1), [shift1] "=&r" (shift1), [coefs] "=&r" (coefs), in WindowAndFFT()
/external/valgrind/coregrind/m_debuginfo/
Dminilzo-inl.c2927 # define _DV2_A(p,shift1,shift2) \ argument
2928 (((( (lzo_xint)((p)[0]) << shift1) ^ (p)[1]) << shift2) ^ (p)[2])
2929 # define _DV2_B(p,shift1,shift2) \ argument
2930 (((( (lzo_xint)((p)[2]) << shift1) ^ (p)[1]) << shift2) ^ (p)[0])
2931 # define _DV3_B(p,shift1,shift2,shift3) \ argument
2932 ((_DV2_B((p)+1,shift1,shift2) << (shift3)) ^ (p)[0])
2934 # define _DV2_A(p,shift1,shift2) \
2935 (( (lzo_xint)(p[0]) << shift1) ^ p[1])
2936 # define _DV2_B(p,shift1,shift2) \
2937 (( (lzo_xint)(p[1]) << shift1) ^ p[2])
/external/libvncserver/common/
Dminilzo.c4427 # define _DV2_A(p,shift1,shift2) \ argument
4428 (((( (lzo_xint)((p)[0]) << shift1) ^ (p)[1]) << shift2) ^ (p)[2])
4429 # define _DV2_B(p,shift1,shift2) \ argument
4430 (((( (lzo_xint)((p)[2]) << shift1) ^ (p)[1]) << shift2) ^ (p)[0])
4431 # define _DV3_B(p,shift1,shift2,shift3) \ argument
4432 ((_DV2_B((p)+1,shift1,shift2) << (shift3)) ^ (p)[0])
4434 # define _DV2_A(p,shift1,shift2) \
4435 (( (lzo_xint)(p[0]) << shift1) ^ p[1])
4436 # define _DV2_B(p,shift1,shift2) \
4437 (( (lzo_xint)(p[1]) << shift1) ^ p[2])
/external/libhevc/common/arm/
Dihevc_itrans_recon_32x32.s238 bhs shift1
273 bhs shift1
309 bhs shift1
347 bhs shift1
483 shift1: label
/external/llvm/test/CodeGen/SystemZ/
Dasm-18.ll515 %shift1 = shl i32 %old, 1
516 %and1 = and i32 %shift1, 14
/external/opencv/cvaux/include/
Dcvvidsurv.hpp1206 int shift1,shift2; member
/external/libhevc/common/arm64/
Dihevc_itrans_recon_32x32.s243 bhs shift1
278 bhs shift1
314 bhs shift1
352 bhs shift1
488 shift1: label
/external/dng_sdk/source/
Ddng_image_writer.cpp3434 int32 shift1 = (fCodeSize + bit) - 8; in PutCodeWord() local
3437 uint8 byte1 = (uint8) (code >> shift1); in PutCodeWord()