Searched refs:sld (Results 1 – 22 of 22) sorted by relevance
140 int32_t sld = dataCodewords.GetLength(); in generateErrorCorrection() local141 for (int32_t i = 0; i < sld; i++) { in generateErrorCorrection()
1 ; RUN: llc < %s -march=ppc64 | grep sld | count 5
108 ; CHECK: sld. 4, 3, 4
1014 ; CHECK: sld1015 ; CHECK: sld
736 ; ALL-DAG: sld.b [[R1]], [[R1]]{{\[}}[[IDX]]]741 ; ALL-DAG: sld.b [[R1]], [[R1]]{{\[}}[[NIDX]]]769 ; ALL-DAG: sld.b [[R1]], [[R1]]{{\[}}[[BIDX]]]774 ; ALL-DAG: sld.b [[R1]], [[R1]]{{\[}}[[NIDX]]]799 ; ALL-DAG: sld.b [[R1]], [[R1]]{{\[}}[[BIDX]]]804 ; ALL-DAG: sld.b [[R1]], [[R1]]{{\[}}[[NIDX]]]834 ; MIPS32-DAG: sld.b [[R1]], [[R1]]{{\[}}[[BIDX]]]837 ; MIPS32-DAG: sld.b [[R1]], [[R1]]{{\[}}[[NIDX]]]840 ; MIPS32-DAG: sld.b [[R1]], [[R1]]{{\[}}[[BIDX]]]843 ; MIPS32-DAG: sld.b [[R1]], [[R1]]{{\[}}[[NIDX]]][all …]
314 ; ALL-DAG: sld.b [[R1]], [[R1]]{{\[}}[[BIDX]]]317 ; ALL-DAG: sld.b [[R1]], [[R1]]{{\[}}[[NIDX]]]343 ; ALL-DAG: sld.b [[R1]], [[R1]]{{\[}}[[BIDX]]]346 ; ALL-DAG: sld.b [[R1]], [[R1]]{{\[}}[[NIDX]]]
17 %3 = tail call <16 x i8> @llvm.mips.sld.b(<16 x i8> %0, <16 x i8> %1, i32 %2)22 declare <16 x i8> @llvm.mips.sld.b(<16 x i8>, <16 x i8>, i32) nounwind31 ; CHECK-DAG: sld.b [[WD]], [[WS]]{{\[}}[[RT]]{{\]}}45 %3 = tail call <8 x i16> @llvm.mips.sld.h(<8 x i16> %0, <8 x i16> %1, i32 %2)50 declare <8 x i16> @llvm.mips.sld.h(<8 x i16>, <8 x i16>, i32) nounwind59 ; CHECK-DAG: sld.h [[WD]], [[WS]]{{\[}}[[RT]]{{\]}}73 %3 = tail call <4 x i32> @llvm.mips.sld.w(<4 x i32> %0, <4 x i32> %1, i32 %2)78 declare <4 x i32> @llvm.mips.sld.w(<4 x i32>, <4 x i32>, i32) nounwind87 ; CHECK-DAG: sld.w [[WD]], [[WS]]{{\[}}[[RT]]{{\]}}101 %3 = tail call <2 x i64> @llvm.mips.sld.d(<2 x i64> %0, <2 x i64> %1, i32 %2)[all …]
193 # CHECK: sld.b $w5, $w23[$12] # encoding: [0x78,0x0c,0xb9,0x54]194 # CHECK: sld.h $w1, $w23[$3] # encoding: [0x78,0x23,0xb8,0x54]195 # CHECK: sld.w $w20, $w8[$9] # encoding: [0x78,0x49,0x45,0x14]196 # CHECK: sld.d $w7, $w23[$fp] # encoding: [0x78,0x7e,0xb9,0xd4]436 sld.b $w5, $w23[$12]437 sld.h $w1, $w23[$3]438 sld.w $w20, $w8[$9]439 sld.d $w7, $w23[$30]
789 # CHECK-BE: sld 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x36]790 # CHECK-LE: sld 2, 3, 4 # encoding: [0x36,0x20,0x62,0x7c]791 sld 2, 3, 4792 # CHECK-BE: sld. 2, 3, 4 # encoding: [0x7c,0x62,0x20,0x37]793 # CHECK-LE: sld. 2, 3, 4 # encoding: [0x37,0x20,0x62,0x7c]794 sld. 2, 3, 4
193 0x78 0x0c 0xb9 0x54 # CHECK: sld.b $w5, $w23[$12]194 0x78 0x23 0xb8 0x54 # CHECK: sld.h $w1, $w23[$3]195 0x78 0x49 0x45 0x14 # CHECK: sld.w $w20, $w8[$9]196 0x78 0x7e 0xb9 0xd4 # CHECK: sld.d $w7, $w23[$fp]
724 sld 0000000000000000, 0000000000000000 => 0000000000000000 (00000000 00000000)725 sld 0000000000000000, 0000001cbe991def => 0000000000000000 (00000000 00000000)726 sld 0000000000000000, ffffffffffffffff => 0000000000000000 (00000000 00000000)727 sld 0000001cbe991def, 0000000000000000 => 0000001cbe991def (00000000 00000000)728 sld 0000001cbe991def, 0000001cbe991def => 0000000000000000 (00000000 00000000)729 sld 0000001cbe991def, ffffffffffffffff => 0000000000000000 (00000000 00000000)730 sld ffffffffffffffff, 0000000000000000 => ffffffffffffffff (00000000 00000000)731 sld ffffffffffffffff, 0000001cbe991def => 0000000000000000 (00000000 00000000)732 sld ffffffffffffffff, ffffffffffffffff => 0000000000000000 (00000000 00000000)865 sld. 0000000000000000, 0000000000000000 => 0000000000000000 (20000000 00000000)[all …]
724 sld 0000000000000000, 0000000000000000 => 0000000000000000 (00000000 00000000)725 sld 0000000000000000, 0000001cbe991def => 0000000000000000 (00000000 00000000)726 sld 0000000000000000, ffffffffffffffff => 0000000000000000 (00000000 00000000)727 sld 0000001cbe991def, 0000000000000000 => 0000001cbe991def (00000000 00000000)728 sld 0000001cbe991def, 0000001cbe991def => 0000000000000000 (00000000 00000000)729 sld 0000001cbe991def, ffffffffffffffff => 0000000000000000 (00000000 00000000)730 sld ffffffffffffffff, 0000000000000000 => ffffffffffffffff (00000000 00000000)731 sld ffffffffffffffff, 0000001cbe991def => 0000000000000000 (00000000 00000000)732 sld ffffffffffffffff, ffffffffffffffff => 0000000000000000 (00000000 00000000)
143 "sld. T.Ɛ",
619 # CHECK: sld 2, 3, 4622 # CHECK: sld. 2, 3, 4
619 # CHECK: sld 2, 3, 4 622 # CHECK: sld. 2, 3, 4
918 void sld(Register dst, Register src1, Register src2, RCBit r = LeaveRC);
85 #define ShiftLeft_ sld
1480 void Assembler::sld(Register dst, Register src1, Register src2, RCBit r) { in sld() function in v8::internal::Assembler
2531 class SLD_B_DESC : MSA_3R_SLD_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd>;2532 class SLD_H_DESC : MSA_3R_SLD_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>;2533 class SLD_W_DESC : MSA_3R_SLD_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>;2534 class SLD_D_DESC : MSA_3R_SLD_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>;
1027 ASSEMBLE_BINOP_RC(sld, sldi); in AssembleArchInstruction()
558 "sld", "$rA, $rS, $rB", IIC_IntRotateD,
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