/external/llvm/test/MC/ARM/ |
D | thumb-neon-v8.s | 48 vrintn.f32 d3, d0 49 @ CHECK: vrintn.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x34] 50 vrintn.f32 q1, q4 51 @ CHECK: vrintn.f32 q1, q4 @ encoding: [0xba,0xff,0x48,0x24] 74 vrintn.f32.f32 d3, d0 75 @ CHECK: vrintn.f32 d3, d0 @ encoding: [0xba,0xff,0x00,0x34]
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D | neon-v8.s | 48 vrintn.f32 d3, d0 49 @ CHECK: vrintn.f32 d3, d0 @ encoding: [0x00,0x34,0xba,0xf3] 50 vrintn.f32 q1, q4 51 @ CHECK: vrintn.f32 q1, q4 @ encoding: [0x48,0x24,0xba,0xf3] 74 vrintn.f32.f32 d3, d0 75 @ CHECK: vrintn.f32 d3, d0 @ encoding: [0x00,0x34,0xba,0xf3]
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D | directive-arch_extension-simd.s | 95 vrintn.f32 s0, s0 97 vrintn.f64 d0, d0 99 vrintn.f32.f32 s0, s0 101 vrintn.f64.f64 d0, d0 203 vrintn.f32 s0, s0 205 vrintn.f64 d0, d0 207 vrintn.f32.f32 s0, s0 209 vrintn.f64.f64 d0, d0
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D | directive-arch_extension-fp.s | 123 vrintn.f32 s0, s0 125 vrintn.f64 d0, d0 127 vrintn.f32.f32 s0, s0 129 vrintn.f64.f64 d0, d0 259 vrintn.f32 s0, s0 261 vrintn.f64 d0, d0 263 vrintn.f32.f32 s0, s0 265 vrintn.f64.f64 d0, d0
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D | thumb-fp-armv8.s | 119 vrintn.f64 d3, d4 120 @ CHECK: vrintn.f64 d3, d4 @ encoding: [0xb9,0xfe,0x44,0x3b] 121 vrintn.f32 s12, s1 122 @ CHECK: vrintn.f32 s12, s1 @ encoding: [0xb9,0xfe,0x60,0x6a]
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D | fp-armv8.s | 113 vrintn.f64 d3, d4 114 @ CHECK: vrintn.f64 d3, d4 @ encoding: [0x44,0x3b,0xb9,0xfe] 115 vrintn.f32 s12, s1 116 @ CHECK: vrintn.f32 s12, s1 @ encoding: [0x60,0x6a,0xb9,0xfe]
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D | fullfp16-neon.s | 378 vrintn.f16.f16 d0, d1 379 vrintn.f16.f16 q0, q1 380 @ ARM: vrintn.f16 d0, d1 @ encoding: [0x01,0x04,0xb6,0xf3] 381 @ ARM: vrintn.f16 q0, q1 @ encoding: [0x42,0x04,0xb6,0xf3] 382 @ THUMB: vrintn.f16 d0, d1 @ encoding: [0xb6,0xff,0x01,0x04] 383 @ THUMB: vrintn.f16 q0, q1 @ encoding: [0xb6,0xff,0x42,0x04]
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D | invalid-neon-v8.s | 21 vrintn.f32 d3, q12
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D | invalid-fp-armv8.s | 84 vrintn.f32.f32 d3, d0
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D | fullfp16-neon-neg.s | 271 vrintn.f16.f16 d0, d1 272 vrintn.f16.f16 q0, q1
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D | diagnostics.s | 474 vrintn.f32 s8, s9
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/external/llvm/test/MC/Disassembler/ARM/ |
D | thumb-neon-v8.txt | 49 # CHECK: vrintn.f32 d3, d0 51 # CHECK: vrintn.f32 q1, q4
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D | neon-v8.txt | 49 # CHECK: vrintn.f32 d3, d0 51 # CHECK: vrintn.f32 q1, q4
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D | thumb-fp-armv8.txt | 148 # CHECK: vrintn.f64 d3, d4 151 # CHECK: vrintn.f32 s12, s1
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D | fp-armv8.txt | 140 # CHECK: vrintn.f64 d3, d4 143 # CHECK: vrintn.f32 s12, s1
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D | fullfp16-neon-arm.txt | 248 # CHECK: vrintn.f16 d0, d1 249 # CHECK: vrintn.f16 q0, q1
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D | fullfp16-neon-thumb.txt | 248 # CHECK: vrintn.f16 d0, d1 249 # CHECK: vrintn.f16 q0, q1
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/external/v8/test/cctest/ |
D | test-disasm-arm.cc | 849 COMPARE(vrintn(d0, d0), "feb90b40 vrintn.f64.f64 d0, d0"); in TEST() 850 COMPARE(vrintn(d2, d3), "feb92b43 vrintn.f64.f64 d2, d3"); in TEST()
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D | test-assembler-arm.cc | 2059 __ vrintn(s5, s6); in TEST() local 2164 __ vrintn(d5, d6); in TEST() local
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/external/v8/src/arm/ |
D | assembler-arm.h | 1276 void vrintn(const SwVfpRegister dst, const SwVfpRegister src); 1277 void vrintn(const DwVfpRegister dst, const DwVfpRegister src);
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D | assembler-arm.cc | 3557 void Assembler::vrintn(const SwVfpRegister dst, const SwVfpRegister src) { in vrintn() function in v8::internal::Assembler 3571 void Assembler::vrintn(const DwVfpRegister dst, const DwVfpRegister src) { in vrintn() function in v8::internal::Assembler
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/external/v8/src/compiler/arm/ |
D | code-generator-arm.cc | 1071 __ vrintn(i.OutputFloatRegister(), i.InputFloatRegister(0)); in AssembleArchInstruction() local 1074 __ vrintn(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); in AssembleArchInstruction() local
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