| /system/core/libmincrypt/ |
| D | sha256.c | 58 uint32_t W[64]; in SHA256_Transform() local
68 W[t] = tmp; in SHA256_Transform()
72 uint32_t s0 = ror(W[t-15], 7) ^ ror(W[t-15], 18) ^ shr(W[t-15], 3); in SHA256_Transform()
73 uint32_t s1 = ror(W[t-2], 17) ^ ror(W[t-2], 19) ^ shr(W[t-2], 10); in SHA256_Transform()
74 W[t] = W[t-16] + s0 + W[t-7] + s1; in SHA256_Transform()
92 uint32_t t1 = H + s1 + ch + K[t] + W[t]; in SHA256_Transform()
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| D | sha.c | 39 uint32_t W[80]; in SHA1_Transform() local
49 W[t] = tmp; in SHA1_Transform()
53 W[t] = rol(1,W[t-3] ^ W[t-8] ^ W[t-14] ^ W[t-16]); in SHA1_Transform()
63 uint32_t tmp = rol(5,A) + E + W[t]; in SHA1_Transform()
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| /system/core/libpixelflinger/codeflinger/ |
| D | ARMAssemblerInterface.cpp | 43 uint32_t ARMAssemblerInterface::__immed12_pre(int32_t immed12, int W) in __immed12_pre() argument
49 ((W&1)<<21) | (abs(immed12)&0x7FF); in __immed12_pre()
52 uint32_t ARMAssemblerInterface::__immed8_pre(int32_t immed8, int W) in __immed8_pre() argument
61 ((W&1)<<21) | (((offset&0xF0)<<4)|(offset&0xF)); in __immed8_pre()
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| D | ARMAssemblerProxy.cpp | 112 uint32_t ARMAssemblerProxy::immed12_pre(int32_t immed12, int W) in immed12_pre() argument
114 return mTarget->immed12_pre(immed12, W); in immed12_pre()
122 uint32_t ARMAssemblerProxy::reg_scale_pre(int Rm, int type, uint32_t shift, int W) in reg_scale_pre() argument
124 return mTarget->reg_scale_pre(Rm, type, shift, W); in reg_scale_pre()
135 uint32_t ARMAssemblerProxy::immed8_pre(int32_t immed8, int W) in immed8_pre() argument
137 return mTarget->immed8_pre(immed8, W); in immed8_pre()
145 uint32_t ARMAssemblerProxy::reg_pre(int Rm, int W) in reg_pre() argument
147 return mTarget->reg_pre(Rm, W); in reg_pre()
236 void ARMAssemblerProxy::LDM(int cc, int dir, int Rn, int W, uint32_t reg_list) { in LDM() argument
237 mTarget->LDM(cc, dir, Rn, W, reg_list); in LDM()
[all …]
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| D | ARMAssemblerProxy.h | 66 virtual uint32_t immed12_pre(int32_t immed12, int W=0);
68 virtual uint32_t reg_scale_pre(int Rm, int type=0, uint32_t shift=0, int W=0);
73 virtual uint32_t immed8_pre(int32_t immed8, int W=0);
75 virtual uint32_t reg_pre(int Rm, int W=0);
121 int Rn, int W, uint32_t reg_list);
123 int Rn, int W, uint32_t reg_list);
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| D | ARMAssembler.h | 77 virtual uint32_t immed12_pre(int32_t immed12, int W=0);
79 virtual uint32_t reg_scale_pre(int Rm, int type=0, uint32_t shift=0, int W=0);
84 virtual uint32_t immed8_pre(int32_t immed8, int W=0);
86 virtual uint32_t reg_pre(int Rm, int W=0);
134 int Rn, int W, uint32_t reg_list);
136 int Rn, int W, uint32_t reg_list);
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| D | ARMAssembler.cpp | 332 int Rn, int W, uint32_t reg_list) in LDM() argument
337 (uint32_t(U[dir])<<23) | (1<<20) | (W<<21) | (Rn<<16) | reg_list; in LDM()
341 int Rn, int W, uint32_t reg_list) in STM() argument
346 (uint32_t(U[dir])<<23) | (0<<20) | (W<<21) | (Rn<<16) | reg_list; in STM()
527 uint32_t ARMAssembler::immed12_pre(int32_t immed12, int W) in immed12_pre() argument
533 ((W&1)<<21) | (abs(immed12)&0x7FF); in immed12_pre()
546 uint32_t shift, int W) in reg_scale_pre() argument
549 (((uint32_t(Rm)>>31)^1)<<23) | ((W&1)<<21) | in reg_scale_pre()
559 uint32_t ARMAssembler::immed8_pre(int32_t immed8, int W) in immed8_pre() argument
568 ((W&1)<<21) | (((offset&0xF0)<<4)|(offset&0xF)); in immed8_pre()
[all …]
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| D | ARMAssemblerInterface.h | 74 static uint32_t __immed12_pre(int32_t immed12, int W=0);
75 static uint32_t __immed8_pre(int32_t immed12, int W=0);
88 virtual uint32_t immed12_pre(int32_t immed12, int W=0) = 0;
90 virtual uint32_t reg_scale_pre(int Rm, int type=0, uint32_t shift=0, int W=0) = 0;
95 virtual uint32_t immed8_pre(int32_t immed8, int W=0) = 0;
97 virtual uint32_t reg_pre(int Rm, int W=0) = 0;
174 int Rn, int W, uint32_t reg_list) = 0;
176 int Rn, int W, uint32_t reg_list) = 0;
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| D | MIPS64Assembler.h | 80 virtual uint32_t immed12_pre(int32_t immed12, int W=0);
82 virtual uint32_t reg_scale_pre(int Rm, int type=0, uint32_t shift=0, int W=0);
87 virtual uint32_t immed8_pre(int32_t immed8, int W=0);
89 virtual uint32_t reg_pre(int Rm, int W=0);
138 int Rn, int W, uint32_t reg_list);
140 int Rn, int W, uint32_t reg_list);
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| D | Arm64Assembler.h | 88 virtual uint32_t immed12_pre(int32_t immed12, int W=0);
90 virtual uint32_t reg_scale_pre(int Rm, int type=0, uint32_t shift=0, int W=0);
92 virtual uint32_t immed8_pre(int32_t immed8, int W=0);
94 virtual uint32_t reg_pre(int Rm, int W=0);
151 int Rn, int W, uint32_t reg_list);
153 int Rn, int W, uint32_t reg_list);
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| D | Arm64Assembler.cpp | 682 int Rn, int W, uint32_t reg_list) in LDM() argument
685 if(cc != AL || dir != IA || W == 0 || Rn != SP) in LDM()
703 int Rn, int W, uint32_t reg_list) in STM() argument
706 if(cc != AL || dir != DB || W == 0 || Rn != SP) in STM()
907 uint32_t ArmToArm64Assembler::immed12_pre(int32_t immed12, int W) in immed12_pre() argument
910 mAddrMode.writeback = W; in immed12_pre()
926 uint32_t shift, int W) in reg_scale_pre() argument
928 if(type != 0 || shift != 0 || W != 0) in reg_scale_pre()
946 uint32_t ArmToArm64Assembler::immed8_pre(int32_t immed8, int W) in immed8_pre() argument
949 mAddrMode.writeback = W; in immed8_pre()
[all …]
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| D | MIPSAssembler.h | 75 virtual uint32_t immed12_pre(int32_t immed12, int W=0);
77 virtual uint32_t reg_scale_pre(int Rm, int type=0, uint32_t shift=0, int W=0);
82 virtual uint32_t immed8_pre(int32_t immed8, int W=0);
84 virtual uint32_t reg_pre(int Rm, int W=0);
133 int Rn, int W, uint32_t reg_list);
135 int Rn, int W, uint32_t reg_list);
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| D | MIPS64Assembler.cpp | 250 uint32_t ArmToMips64Assembler::immed12_pre(int32_t immed12, int W) in immed12_pre() argument
256 amode.writeback = W; in immed12_pre()
271 uint32_t shift, int W) in reg_scale_pre() argument
273 LOG_ALWAYS_FATAL_IF(W | type | shift, "reg_scale_pre adv modes not yet implemented"); in reg_scale_pre()
289 uint32_t ArmToMips64Assembler::immed8_pre(int32_t immed8, int W) in immed8_pre() argument
308 uint32_t ArmToMips64Assembler::reg_pre(int Rm, int W) in reg_pre() argument
310 LOG_ALWAYS_FATAL_IF(W, "reg_pre writeback not yet implemented"); in reg_pre()
966 int Rn, int W, uint32_t reg_list) in LDM() argument
978 int Rn, int W, uint32_t reg_list) in STM() argument
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| D | MIPSAssembler.cpp | 257 uint32_t ArmToMipsAssembler::immed12_pre(int32_t immed12, int W) in immed12_pre() argument
263 amode.writeback = W; in immed12_pre()
278 uint32_t shift, int W) in reg_scale_pre() argument
280 LOG_ALWAYS_FATAL_IF(W | type | shift, "reg_scale_pre adv modes not yet implemented"); in reg_scale_pre()
296 uint32_t ArmToMipsAssembler::immed8_pre(int32_t immed8, int W) in immed8_pre() argument
319 uint32_t ArmToMipsAssembler::reg_pre(int Rm, int W) in reg_pre() argument
321 LOG_ALWAYS_FATAL_IF(W, "reg_pre writeback not yet implemented"); in reg_pre()
974 int Rn, int W, uint32_t reg_list) in LDM() argument
986 int Rn, int W, uint32_t reg_list) in STM() argument
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| /system/extras/tests/workloads/ |
| D | pwrsummary.sh | 65 …rintf "%s,%s,%s,%s,%s,%s,%s,%s,%s\n" " " build min ave max net-mA@${voltage}v base-mW net-mW perf/W
67 …s %12.12s %12.12s %12.12s %12.12s\n" " " build min ave max net-mA@${voltage}v base-mW net-mW perf/W
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| /system/extras/perfprofd/tests/ |
| D | perfprofd_test.cc | 323 W: unable to open config directory /does/not/exist: (No such file or directory) in TEST_F()
472 …W: line 6: specified value 0 for 'collection_interval' outside permitted range [100 4294967295] (i… in TEST_F()
473 W: line 7: malformed unsigned value (ignored) in TEST_F()
474 …W: line 8: specified value 2 for 'collection_interval' outside permitted range [100 4294967295] (i… in TEST_F()
475 W: line 9: unknown option 'nonexistent_key' ignored in TEST_F()
476 W: line 10: line malformed (no '=' found) in TEST_F()
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| /system/extras/simpleperf/ |
| D | report.py | 153 label.pack(anchor=W, padx=PAD_X, pady=PAD_Y)
157 label.pack(anchor=W, padx=PAD_X, pady=PAD_Y)
161 label.pack(anchor=W, padx=PAD_X, pady=PAD_Y)
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| /system/update_engine/payload_generator/ |
| D | zip_unittest.cc | 70 template <typename W>
73 new W(brillo::make_unique_ptr(new MemoryExtentWriter(out)))); in DecompressWithWriter()
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| /system/bt/stack/smp/ |
| D | p_256_multprecision.c | 271 DWORD W; in multiprecision_mult() local
275 U = V = W = 0; in multiprecision_mult()
286 W = result >> 32; in multiprecision_mult()
290 U += W; in multiprecision_mult()
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| /system/ca-certificates/files/ |
| D | 4be590e0.0 | 10 bdsHyo+1W/CD80/HLaXIrcuVIKQxKFdYWuSNG5qrng0M8gozOSI5Cpcu81N3uURF
18 W/3FKqD2cyOEEBsB5wIDAQABo0IwQDAOBgNVHQ8BAf8EBAMCAQYwDwYDVR0TAQH/
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| D | c7e2a638.0 | 13 5whMcD60yRLBxWeDXTPzAxHsatBT4tG6NmCUgLthY2xbF37fQJQeqw3CIShwiP/W
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| D | 17b51fe6.0 | 7 ltAS+DXSCHh6tlJw/W/uz7kRy1134ezpfgSN1sxvc0NXYKwzCkTsA18cgCSR5aiR
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| D | cb1c3204.0 | 16 sx7QBlrd9pPPV3WZ9fqGGmd4s7+W/jTcvedSVuWz5XV710GRBdxdaeOVDUO5/IOW
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| /system/core/libpixelflinger/ |
| D | picker.cpp | 102 n |= GGL_BUILD_NEEDS((enables & GGL_ENABLE_W) ?1:0, W); in ggl_pick()
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| /system/ca-certificates/google/files/ |
| D | c7e2a638.0 | 13 5whMcD60yRLBxWeDXTPzAxHsatBT4tG6NmCUgLthY2xbF37fQJQeqw3CIShwiP/W
|