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Searched refs:r1 (Results 1 – 17 of 17) sorted by relevance

/system/extras/simpleperf/
Drecord_equal_test.h17 static void CheckMmapRecordDataEqual(const MmapRecord& r1, const MmapRecord& r2) { in CheckMmapRecordDataEqual() argument
18 ASSERT_EQ(0, memcmp(&r1.data, &r2.data, sizeof(r1.data))); in CheckMmapRecordDataEqual()
19 ASSERT_EQ(r1.filename, r2.filename); in CheckMmapRecordDataEqual()
22 static void CheckCommRecordDataEqual(const CommRecord& r1, const CommRecord& r2) { in CheckCommRecordDataEqual() argument
23 ASSERT_EQ(0, memcmp(&r1.data, &r2.data, sizeof(r1.data))); in CheckCommRecordDataEqual()
24 ASSERT_EQ(r1.comm, r2.comm); in CheckCommRecordDataEqual()
27 static void CheckBuildIdRecordDataEqual(const BuildIdRecord& r1, const BuildIdRecord& r2) { in CheckBuildIdRecordDataEqual() argument
28 ASSERT_EQ(r1.pid, r2.pid); in CheckBuildIdRecordDataEqual()
29 ASSERT_EQ(r1.build_id, r2.build_id); in CheckBuildIdRecordDataEqual()
30 ASSERT_EQ(r1.filename, r2.filename); in CheckBuildIdRecordDataEqual()
[all …]
Drecord_test.cpp62 MmapRecord r1 = CreateMmapRecord(event_attr, true, 1, 1, 0x100, 0x200, 0x300, "mmap_record1"); in TEST_F() local
63 MmapRecord r2 = r1; in TEST_F()
64 MmapRecord r3 = r1; in TEST_F()
65 MmapRecord r4 = r1; in TEST_F()
66 r1.sample_id.time_data.time = 3; in TEST_F()
70 std::vector<char> buf1 = r1.BinaryFormat(); in TEST_F()
92 CheckRecordEqual(r1, *popped_r); in TEST_F()
Drecord_file_test.cpp113 MmapRecord r1 = in TEST_F() local
115 MmapRecord r2 = r1; in TEST_F()
116 MmapRecord r3 = r1; in TEST_F()
117 r1.sample_id.time_data.time = 2; in TEST_F()
120 ASSERT_TRUE(writer->WriteData(r1.BinaryFormat())); in TEST_F()
131 CheckRecordEqual(r1, *records[1]); in TEST_F()
Drecord.h342 bool operator()(const RecordWithSeq& r1, const RecordWithSeq& r2);
Drecord.cpp709 bool RecordCache::RecordComparator::operator()(const RecordWithSeq& r1, in operator ()() argument
711 return r2.IsHappensBefore(r1); in operator ()()
/system/core/libcutils/arch-arm/
Dmemset32.S45 mov r1, r1, lsl #16
46 orr r1, r1, r1, lsr #16
50 strhne r1, [r0], #2
62 mov r12, r1
63 mov lr, r1
73 stmiacs r0!, {r1, lr}
74 stmiacs r0!, {r1, lr}
75 stmiami r0!, {r1, lr}
77 strcs r1, [r0], #4
80 mov r3, r1
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/system/core/libpixelflinger/
Dcol32cb16blend.S42 mov r5, r1, lsr #24 // shift down alpha
46 and r10, r1, #0xff // extract red
47 and r12, r9, r1, lsr #8 // extract green
48 and r4, r9, r1, lsr #16 // extract blue
Drotate90CW_4x4_16v6.S40 ldrd r2, r3, [r1], r14
41 ldrd r4, r5, [r1], r14
42 ldrd r6, r7, [r1], r14
43 ldrd r8, r9, [r1]
Dt32cb16blend.S144 pld [r1]
154 ldr r4, [r1], #4
164 8: ldmia r1!, {r4, r5}
166 pld [r1, #32]
186 ldmia r1!, {r4, r5}
Dcol32cb16blend_neon.S52 vld4.8 {d0[], d2[], d4[], d6[]}, [r1] // load color into four registers
118 ldr r4, [r1] // load source color
/system/core/libpixelflinger/codeflinger/
DMIPS64Assembler.cpp191 cond.r1 = R1; in set_condition()
346 if (Rd == cond.r1) { in protectConditionalOperands()
347 mMips->MOVE(R_cmp, cond.r1); in protectConditionalOperands()
348 cond.r1 = R_cmp; in protectConditionalOperands()
566 cond.r1 = Rn; in dataProcessing()
592 cond.r1 = Rd; in dataProcessing()
614 cond.r1 = Rd; in MLA()
624 cond.r1 = Rd; in MUL()
636 cond.r1 = RdHi; // BUG... in UMULL()
652 cond.r1 = RdHi; // BUG... in UMUAL()
[all …]
DMIPSAssembler.cpp357 if (Rd == cond.r1) { in protectConditionalOperands()
358 mMips->MOVE(R_cmp, cond.r1); in protectConditionalOperands()
359 cond.r1 = R_cmp; in protectConditionalOperands()
575 cond.r1 = Rn; in dataProcessing()
601 cond.r1 = Rd; in dataProcessing()
622 cond.r1 = Rd; in MLA()
632 cond.r1 = Rd; in MUL()
644 cond.r1 = RdHi; // BUG... in UMULL()
660 cond.r1 = RdHi; // BUG... in UMUAL()
676 cond.r1 = RdHi; // BUG... in SMULL()
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DMIPS64Assembler.h234 int r1; member
DMIPSAssembler.h223 int r1; member
/system/core/debuggerd/arm/
Dcrashglue.S5 ldr r1, =0xa5a50001
/system/core/adb/
Dfile_sync_client.cpp870 int r1 = utime(lpath.c_str(), &times); in set_time_and_mode() local
877 return r1 ? r1 : r2; in set_time_and_mode()
/system/extras/tests/icachetest/
Dicache.S42 subs r0, r0, r1
43 mov r2, r1