Searched refs:AllReg (Results 1 – 2 of 2) sorted by relevance
/toolchain/binutils/binutils-2.25/include/opcode/ |
D | tic30.h | 210 #define GAddr2 GAddr1 | AllReg 214 #define AllReg Reg | DPReg | OtherReg macro 248 { "absi" ,2,0x00800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt }, 249 { "addc" ,2,0x01000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt }, 250 { "addc3" ,3,0x20000000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None }, 253 { "addi" ,2,0x02000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt }, 254 { "addi3" ,3,0x21000000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None }, 255 { "and" ,2,0x02800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_UInt }, 256 { "and3" ,3,0x21800000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None }, 257 { "andn" ,2,0x03000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_UInt }, [all …]
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/toolchain/binutils/binutils-2.25/gas/config/ |
D | tc-tic30.c | 1614 if (insn.operand_type[addr_insn]->op_type & (AllReg)) in md_assemble() 1644 if (insn.operand_type[1]->op_type & (AllReg)) in md_assemble() 1656 if (insn.operand_type[1]->op_type & (AllReg)) in md_assemble() 1828 if ((insn.tm->operand_types[0] & (AllReg | Disp)) in md_assemble() 1829 == (AllReg | Disp)) in md_assemble() 1831 if (insn.operand_type[0]->op_type & (AllReg)) in md_assemble() 1859 if (insn.operand_type[1]->op_type & (AllReg)) in md_assemble()
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