Searched refs:BL (Results 1 – 22 of 22) sorted by relevance
26 OMa, SI, I7, LS, BR, BL, LR, LJ, enumerator92 { "loopt", BL, 0, 0x0400 },
220 case BL:
320 #define BL { OP_IMREG, bl_reg } macro
1 @ Test to ensure that a Thumb-1 BL works.
1 @ Test to ensure that a Thumb-2 BL works with an offset that is
1 @ Test to ensure that a Thumb-1 BL with a Thumb-2-only offset makes the linker generate a stub.
1 @ Test to ensure that a Thumb-2 BL with an oversize offset makes the linker generate a stub.
193 #define BL 0x14000000 macro1911 { CMPO, BL }, /* 0x34 - cmpobl */1919 { CMPI, BL }, /* 0x3c - cmpibl */
1430 case BL: in md_assemble()
8 # This file is the same as inst.d except that the BL
319 (EQ NE GTU GTEU LTEU LTU GT GTE LT LTE BEQ BNE BLT BLTE B BL))1186 ;; BL R,ADDR
1020 * ld-arm/arm-elf.exp (armelftests): Move "Thumb-2 BL" test into...
50 * config/tc-arm.c (md_apply_fix): Fix conversion of BL to BLX for
3798 slots when processing BL fixups.3800 * config/tc-arm.c (output_inst): Ensure Thumb BL fixup is marked
7213 * config/tc-arm.c (insns): Change displacement encoded in BL
1780 using BL/BLX.
5657 * gas/arm/thumb.s (back): Check assembly of Thumb BL.
571 (elf32_arm_final_link_relocate): Cope with Thumb-2 BL encoding.
4783 (coff_arm_relocate_section): [ARM_WINCE] Quick fix for BL instruction
7630 available with BL, not BE and BLE.
4407 in computation of offset to insert into BL instruction.
5081 * m68k-pinsn.c (print_insn_arg): Support BB/BW/BL