| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | ia64-opc-m.c | 98 #define EMPTY 0,0,NULL macro
104 {"chk.a.nc", M0, OpX3 (0, 4), {R1, TGT25c}, EMPTY},
105 {"chk.a.clr", M0, OpX3 (0, 5), {R1, TGT25c}, EMPTY},
106 {"chk.a.nc", M0, OpX3 (0, 6), {F1, TGT25c}, EMPTY},
107 {"chk.a.clr", M0, OpX3 (0, 7), {F1, TGT25c}, EMPTY},
109 {"invala", M0, OpX3X4X2 (0, 0, 0, 1), {}, EMPTY},
110 {"fwb", M0, OpX3X4X2 (0, 0, 0, 2), {}, EMPTY},
111 {"mf", M0, OpX3X4X2 (0, 0, 2, 2), {}, EMPTY},
112 {"mf.a", M0, OpX3X4X2 (0, 0, 3, 2), {}, EMPTY},
113 {"srlz.d", M0, OpX3X4X2 (0, 0, 0, 3), {}, EMPTY},
[all …]
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| D | ia64-opc-f.c | 83 #define EMPTY 0,0,NULL macro
89 {"frcpa.s0", f2, OpXbQSf (0, 1, 0, 0), {F1, P2, F2, F3}, EMPTY},
91 {"frcpa.s1", f2, OpXbQSf (0, 1, 0, 1), {F1, P2, F2, F3}, EMPTY},
92 {"frcpa.s2", f2, OpXbQSf (0, 1, 0, 2), {F1, P2, F2, F3}, EMPTY},
93 {"frcpa.s3", f2, OpXbQSf (0, 1, 0, 3), {F1, P2, F2, F3}, EMPTY},
95 {"frsqrta.s0", f2, OpXbQSf (0, 1, 1, 0), {F1, P2, F3}, EMPTY},
97 {"frsqrta.s1", f2, OpXbQSf (0, 1, 1, 1), {F1, P2, F3}, EMPTY},
98 {"frsqrta.s2", f2, OpXbQSf (0, 1, 1, 2), {F1, P2, F3}, EMPTY},
99 {"frsqrta.s3", f2, OpXbQSf (0, 1, 1, 3), {F1, P2, F3}, EMPTY},
101 {"fmin.s0", f, OpXbX6Sf (0, 0, 0x14, 0), {F1, F2, F3}, EMPTY},
[all …]
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| D | ia64-opc-a.c | 87 #define EMPTY 0,0,NULL macro
93 {"add", A, OpX2aVeX4X2b (8, 0, 0, 0, 0), {R1, R2, R3}, EMPTY},
94 {"add", A, OpX2aVeX4X2b (8, 0, 0, 0, 1), {R1, R2, R3, C1}, EMPTY},
95 {"sub", A, OpX2aVeX4X2b (8, 0, 0, 1, 1), {R1, R2, R3}, EMPTY},
96 {"sub", A, OpX2aVeX4X2b (8, 0, 0, 1, 0), {R1, R2, R3, C1}, EMPTY},
97 {"addp4", A, OpX2aVeX4X2b (8, 0, 0, 2, 0), {R1, R2, R3}, EMPTY},
98 {"and", A, OpX2aVeX4X2b (8, 0, 0, 3, 0), {R1, R2, R3}, EMPTY},
99 {"andcm", A, OpX2aVeX4X2b (8, 0, 0, 3, 1), {R1, R2, R3}, EMPTY},
100 {"or", A, OpX2aVeX4X2b (8, 0, 0, 3, 2), {R1, R2, R3}, EMPTY},
101 {"xor", A, OpX2aVeX4X2b (8, 0, 0, 3, 3), {R1, R2, R3}, EMPTY},
[all …]
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| D | ia64-opc-i.c | 107 #define EMPTY 0,0,NULL macro
116 {"chk.s.i", I0, OpX3 (0, 1), {R2, TGT25b}, EMPTY},
120 I, OpX3XbIhWh (0, a, b, c, d), {B1, R2, TAG13b}, EMPTY
134 {"mov", I, OpX3X6 (0, 0, 0x31), {R1, B2}, EMPTY},
135 {"mov", I, OpX3 (0, 3), {PR, R2, IMM17}, EMPTY},
138 {"mov", I, OpX3 (0, 2), {PR_ROT, IMM44}, EMPTY},
139 {"mov", I, OpX3X6 (0, 0, 0x30), {R1, IP}, EMPTY},
140 {"mov", I, OpX3X6 (0, 0, 0x33), {R1, PR}, EMPTY},
141 {"mov.i", I, OpX3X6 (0, 0, 0x2a), {AR3, R2}, EMPTY},
142 {"mov.i", I, OpX3X6 (0, 0, 0x0a), {AR3, IMM8}, EMPTY},
[all …]
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| D | ia64-opc-b.c | 74 #define EMPTY 0,0,NULL macro
90 #define BR(a,b,c,d,e) B0, OpX6BtypePaWhaD (0, a, b, c, d, e), {B2}, EMPTY
203 {"break.b", B0, OpX6 (0, 0x00), {IMMU21}, EMPTY},
205 {"br.call.sptk.few", B, OpPaWhcD (1, 0, 1, 0), {B1, B2}, EMPTY},
207 {"br.call.sptk.few.clr", B, OpPaWhcD (1, 0, 1, 1), {B1, B2}, EMPTY},
209 {"br.call.spnt.few", B, OpPaWhcD (1, 0, 3, 0), {B1, B2}, EMPTY},
211 {"br.call.spnt.few.clr", B, OpPaWhcD (1, 0, 3, 1), {B1, B2}, EMPTY},
213 {"br.call.dptk.few", B, OpPaWhcD (1, 0, 5, 0), {B1, B2}, EMPTY},
215 {"br.call.dptk.few.clr", B, OpPaWhcD (1, 0, 5, 1), {B1, B2}, EMPTY},
217 {"br.call.dpnt.few", B, OpPaWhcD (1, 0, 7, 0), {B1, B2}, EMPTY},
[all …]
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| /toolchain/binutils/binutils-2.25/gas/config/ |
| D | tc-sh.c | 331 #define EMPTY { 0, 0, 0, 0 } macro
334 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
335 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
337 EMPTY,
346 EMPTY, EMPTY, EMPTY,
347 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
349 EMPTY,
358 EMPTY, EMPTY, EMPTY,
359 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY,
361 EMPTY,
[all …]
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