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Searched refs:FLD_Rn (Results 1 – 5 of 5) sorted by relevance

/toolchain/binutils/binutils-2.25/opcodes/
Daarch64-opc-2.c29 …{AARCH64_OPND_CLASS_INT_REG, "Rn", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an integer…
37 …EG, "Rn_SP", OPD_F_MAYBE_SP | OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "an integer or s…
42 …{AARCH64_OPND_CLASS_FP_REG, "Fn", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "a floating-…
48 …{AARCH64_OPND_CLASS_SISD_REG, "Sn", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "a SIMD sc…
51 …{AARCH64_OPND_CLASS_SIMD_REG, "Vn", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "a SIMD ve…
54 …{AARCH64_OPND_CLASS_FP_REG, "VnD1", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "the top h…
56 …{AARCH64_OPND_CLASS_SIMD_ELEMENT, "En", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "a SIM…
58 …{AARCH64_OPND_CLASS_SIMD_REGLIST, "LVn", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn}, "a SI…
103 …{AARCH64_OPND_CLASS_ADDRESS, "ADDR_UIMM12", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_Rn,FLD_…
Daarch64-asm.c496 insert_field (FLD_Rn, code, info->addr.base_regno, 0); in aarch64_ins_addr_simple()
511 insert_field (FLD_Rn, code, info->addr.base_regno, 0); in aarch64_ins_addr_regoff()
543 insert_field (FLD_Rn, code, info->addr.base_regno, 0); in aarch64_ins_addr_simm()
589 insert_field (FLD_Rn, code, info->addr.base_regno, 0); in aarch64_ins_simd_addr_post()
Daarch64-opc.h45 FLD_Rn, enumerator
Daarch64-dis.c831 info->addr.base_regno = extract_field (FLD_Rn, code, 0); in aarch64_ext_addr_simple()
845 info->addr.base_regno = extract_field (FLD_Rn, code, 0); in aarch64_ext_addr_regoff()
888 info->addr.base_regno = extract_field (FLD_Rn, code, 0); in aarch64_ext_addr_simm()
942 info->addr.base_regno = extract_field (FLD_Rn, code, 0); in aarch64_ext_simd_addr_post()
Daarch64-tbl.h2309 Y(INT_REG, regno, "Rn", 0, F(FLD_Rn), "an integer register") \
2319 Y(INT_REG, regno, "Rn_SP", OPD_F_MAYBE_SP, F(FLD_Rn), \
2328 Y(FP_REG, regno, "Fn", 0, F(FLD_Rn), "a floating-point register") \
2334 Y(SISD_REG, regno, "Sn", 0, F(FLD_Rn), "a SIMD scalar register") \
2337 Y(SIMD_REG, regno, "Vn", 0, F(FLD_Rn), "a SIMD vector register") \
2341 Y(FP_REG, regno, "VnD1", 0, F(FLD_Rn), \
2345 Y(SIMD_ELEMENT, reglane, "En", 0, F(FLD_Rn), \
2349 Y(SIMD_REGLIST, reglist, "LVn", 0, F(FLD_Rn), \
2434 Y(ADDRESS, addr_uimm12, "ADDR_UIMM12", 0, F(FLD_Rn,FLD_imm12), \