Searched refs:IMM1 (Results 1 – 5 of 5) sorted by relevance
| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | ia64-opc.h | 97 #define IMM1 IA64_OPND_IMM1 macro
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| D | m32r-opc.c | 843 { { MNEM, ' ', OP (ACCD), ',', OP (ACCS), ',', OP (IMM1), 0 } },
855 { { MNEM, ' ', OP (ACCD), ',', OP (ACCS), ',', OP (IMM1), 0 } },
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| D | ia64-opc-i.c | 171 {"dep", I, OpX2X (5, 3, 1), {R1, IMM1, R3, CPOS6b, LEN6}, EMPTY},
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| D | m32r-opinst.c | 392 { INPUT, "imm1", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (IMM1), 0, 0 },
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| D | ChangeLog-0001 | 1391 * sh-opc.h: The operand of `mov.w r0, (<disp>,GBR)' is IMM1, not 0.
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