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Searched refs:IND (Results 1 – 11 of 11) sorted by relevance

/toolchain/binutils/binutils-2.25/opcodes/
Dia64-ic.tbl25 ….i, itr.d, IC:mov-to-AR-gr, IC:mov-to-BR, IC:mov-to-CR, IC:mov-to-IND, IC:mov-from-IND, IC:mov-to-…
26 gr-readers-writers; IC:mov-from-IND, add, addl, addp4, adds, and, andcm, clz, IC:czx, dep\dep[Forma…
124 mov-from-IND; mov_indirect[Format in {M43}]
125 mov-from-IND-CPUID; IC:mov-from-IND[Field(ireg) == cpuid]
126 mov-from-IND-DBR; IC:mov-from-IND[Field(ireg) == dbr]
127 mov-from-IND-IBR; IC:mov-from-IND[Field(ireg) == ibr]
128 mov-from-IND-MSR; IC:mov-from-IND[Field(ireg) == msr]
129 mov-from-IND-PKR; IC:mov-from-IND[Field(ireg) == pkr]
130 mov-from-IND-PMC; IC:mov-from-IND[Field(ireg) == pmc]
131 mov-from-IND-PMD; IC:mov-from-IND[Field(ireg) == pmd]
[all …]
Dia64-raw.tbl45 CPUID#; IC:none; IC:mov-from-IND-CPUID+3; specific
80 DBR#; IC:mov-to-IND-DBR+3; IC:mov-from-IND-DBR+3; impliedF
81 DBR#; IC:mov-to-IND-DBR+3; IC:probe-all, IC:lfetch-all, IC:mem-readers, IC:mem-writers; data
98 IBR#; IC:mov-to-IND-IBR+3; IC:mov-from-IND-IBR+3; impliedF
115 MSR#; IC:mov-to-IND-MSR+5; IC:mov-from-IND-MSR+5; specific
116 PKR#; IC:mov-to-IND-PKR+3; IC:mem-readers, IC:mem-writers, IC:mov-from-IND-PKR+4, IC:probe-all; data
117 PKR#; IC:mov-to-IND-PKR+3; IC:mov-to-IND-PKR+4; none
118 PKR#; IC:mov-to-IND-PKR+3; IC:mov-from-IND-PKR+3; impliedF
119 PKR#; IC:mov-to-IND-PKR+3; IC:mov-to-IND-PKR+3; impliedF
120 PMC#; IC:mov-to-IND-PMC+3; IC:mov-from-IND-PMC+3; impliedF
[all …]
Dia64-waw.tbl71 DBR#; IC:mov-to-IND-DBR+3; IC:mov-to-IND-DBR+3; impliedF
82 IBR#; IC:mov-to-IND-IBR+3; IC:mov-to-IND-IBR+3; impliedF
90 MSR#; IC:mov-to-IND-MSR+5; IC:mov-to-IND-MSR+5; SC
91 PKR#; IC:mov-to-IND-PKR+3; IC:mov-to-IND-PKR+4; none
92 PKR#; IC:mov-to-IND-PKR+3; IC:mov-to-IND-PKR+3; impliedF
93 PMC#; IC:mov-to-IND-PMC+3; IC:mov-to-IND-PMC+3; impliedF
94 PMD#; IC:mov-to-IND-PMD+3; IC:mov-to-IND-PMD+3; impliedF
139 RR#; IC:mov-to-IND-RR+6; IC:mov-to-IND-RR+6; impliedF
Dh8300-dis.c248 else if ((x & MODE) == IND) in print_one_arg()
472 || (looking_for & MODE) == IND in bfd_h8_disassemble()
/toolchain/binutils/binutils-2.25/bfd/
Dcpu-ia64-opc.c468 #define IND IA64_OPND_CLASS_IND macro
526 { IND, ins_reg, ext_reg, "", {{7, 20}}, 0, /* MR3 */
530 { IND, ins_reg, ext_reg, "cpuid", {{7, 20}}, 0, /* CPUID_R3 */
532 { IND, ins_reg, ext_reg, "dbr", {{7, 20}}, 0, /* DBR_R3 */
534 { IND, ins_reg, ext_reg, "dtr", {{7, 20}}, 0, /* DTR_R3 */
536 { IND, ins_reg, ext_reg, "itr", {{7, 20}}, 0, /* ITR_R3 */
538 { IND, ins_reg, ext_reg, "ibr", {{7, 20}}, 0, /* IBR_R3 */
540 { IND, ins_reg, ext_reg, "msr", {{7, 20}}, 0, /* MSR_R3 */
542 { IND, ins_reg, ext_reg, "pkr", {{7, 20}}, 0, /* PKR_R3 */
544 { IND, ins_reg, ext_reg, "pmc", {{7, 20}}, 0, /* PMC_R3 */
[all …]
Dlinker.c1341 IND, /* Make indirect symbol. */ enumerator
1362 /* INDR_ROW */ {IND, IND, IND, MDEF, IND, CIND, MIND, CYCLE },
1740 case IND: in _bfd_generic_link_add_one_symbol()
DChangeLog-0001392 BFD_{ABS,COM,UND,IND}_SECTION_NAME.
/toolchain/binutils/binutils-2.25/gas/config/
Dtc-ns32k.c315 #define IND(x,y) (((x)<<2)+(y)) macro
346 {(63), (-64), 1, IND (BRANCH, WORD)},
347 {(8192), (-8192), 2, IND (BRANCH, DOUBLE)},
962 IND (BRANCH, BYTE), in encode_operand()
994 pcrel, pcrel_adjust, 1, IND (BRANCH, BYTE), NULL, -1, 0); in encode_operand()
1001 pcrel, pcrel_adjust, 1, IND (BRANCH, BYTE), NULL, -1, 1); in encode_operand()
1834 IND (BRANCH, UNDEF), /* Expecting in convert_iif()
2016 case IND (BRANCH, BYTE): in md_convert_frag()
2019 case IND (BRANCH, WORD): in md_convert_frag()
2022 case IND (BRANCH, DOUBLE): in md_convert_frag()
[all …]
Dtc-h8300.c853 op->mode = direction | IND | PSIZE; in get_operand()
1508 || c2 == IND || c2 == PREINC || c2 == PREDEC in build_bytes()
/toolchain/binutils/binutils-2.25/include/opcode/
Dm88k.h389 IND = 3, enumerator
Dh8300.h52 IND = 0x0600, enumerator
210 RSIND = SRC | IND,
211 RDIND = DST | IND,
212 R3_IND = OP3 | IND,