| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | i386-tbl.h | 25 { "mov", 2, 0xa0, None, 1,
41 { "mov", 2, 0xa0, None, 1,
57 { "mov", 2, 0x88, None, 1,
73 { "mov", 2, 0xb0, None, 1,
105 { "mov", 2, 0xb0, None, 1,
121 { "mov", 2, 0x8c, None, 1,
137 { "mov", 2, 0x8c, None, 1,
153 { "mov", 2, 0x8c, None, 1,
169 { "mov", 2, 0x8c, None, 1,
185 { "mov", 2, 0x8e, None, 1,
[all …]
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| D | i386-opc.tbl | 24 mov, 2, 0xa0, None, 1, Cpu64, D|W|CheckRegSize|No_sSuf|No_ldSuf, { Disp64|Unspecified|Byte|Word|Dwo…
25 mov, 2, 0xa0, None, 1, CpuNo64, D|W|CheckRegSize|No_sSuf|No_qSuf|No_ldSuf, { Disp16|Disp32|Unspecif…
26 mov, 2, 0x88, None, 1, 0, D|W|CheckRegSize|Modrm|No_sSuf|No_ldSuf|HLEPrefixOk=3, { Reg8|Reg16|Reg32…
29 mov, 2, 0xb0, None, 1, 0, W|CheckRegSize|ShortForm|No_sSuf|No_qSuf|No_ldSuf, { Imm8|Imm16|Imm32|Imm…
31 mov, 2, 0xb0, None, 1, Cpu64, W|ShortForm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_ldSuf, { Imm64, Reg64 }
37 mov, 2, 0x8c, None, 1, 0, Modrm|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { SReg2, Reg16|Reg32|Reg64|RegMem…
38 mov, 2, 0x8c, None, 1, 0, Modrm|IgnoreSize|No_bSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { SReg2, Word|…
39 mov, 2, 0x8c, None, 1, Cpu386, Modrm|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { SReg3, Reg16|Reg32|Reg64|R…
40 mov, 2, 0x8c, None, 1, Cpu386, Modrm|IgnoreSize|No_bSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { SReg3, …
41 mov, 2, 0x8e, None, 1, 0, Modrm|IgnoreSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Reg32|Reg64, S…
[all …]
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| D | rl78-decode.opc | 200 ID(add); DR(A); SM(None, IMMU(2)); Fzac;
221 ID(add); DR(A); SM(None, SADDR); Fzac;
227 ID(add); DM(None, SADDR); SC(IMMU(1)); Fzac;
232 ID(addc); DR(A); SM(None, IMMU(2)); Fzac;
256 ID(addc); DR(A); SM(None, SADDR); Fzac;
259 ID(addc); DM(None, SADDR); SC(IMMU(1)); Fzac;
264 ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac;
276 ID(add); W(); DR(AX); SM(None, SADDR); Fzac;
284 ID(and); DR(A); SM(None, IMMU(2)); Fz;
308 ID(and); DR(A); SM(None, SADDR); Fz;
[all …]
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| D | rl78-decode.c | 242 ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac; in rl78_decode_opcode()
272 ID(add); W(); DR(AX); SM(None, SADDR); Fzac; in rl78_decode_opcode()
319 ID(add); DM(None, SADDR); SC(IMMU(1)); Fzac; in rl78_decode_opcode()
336 ID(add); DR(A); SM(None, SADDR); Fzac; in rl78_decode_opcode()
396 ID(add); DR(A); SM(None, IMMU(2)); Fzac; in rl78_decode_opcode()
518 ID(addc); DM(None, SADDR); SC(IMMU(1)); Fzac; in rl78_decode_opcode()
535 ID(addc); DR(A); SM(None, SADDR); Fzac; in rl78_decode_opcode()
595 ID(addc); DR(A); SM(None, IMMU(2)); Fzac; in rl78_decode_opcode()
648 ID(sub); W(); DR(AX); SM(None, IMMU(2)); Fzac; in rl78_decode_opcode()
678 ID(sub); W(); DR(AX); SM(None, SADDR); Fzac; in rl78_decode_opcode()
[all …]
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| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-mips-elf/ |
| D | attr-gnu-4-00.d | 13 ISA Extension: None
15 None
|
| D | attr-gnu-4-33.d | 17 ISA Extension: None
19 None
|
| D | attr-gnu-4-30.d | 17 ISA Extension: None
19 None
|
| D | attr-gnu-4-08.d | 17 ISA Extension: None
19 None
|
| D | attr-gnu-4-11.d | 17 ISA Extension: None
19 None
|
| D | attr-gnu-4-01.d | 17 ISA Extension: None
19 None
|
| D | attr-gnu-4-03.d | 18 ISA Extension: None
20 None
|
| D | attr-gnu-4-02.d | 17 ISA Extension: None
19 None
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| D | elf_arch_mips32r2.d | 16 ISA Extension: None
18 None
|
| D | elf_arch_mips2.d | 16 ISA Extension: None
18 None
|
| D | elf_arch_mips3.d | 16 ISA Extension: None
18 None
|
| D | elf_arch_mips64.d | 16 ISA Extension: None
18 None
|
| D | elf_arch_mips64r3.d | 16 ISA Extension: None
18 None
|
| D | elf_arch_mips64r5.d | 16 ISA Extension: None
18 None
|
| D | elf_arch_mips4.d | 16 ISA Extension: None
18 None
|
| D | elf_arch_mips32r3.d | 16 ISA Extension: None
18 None
|
| D | elf_arch_mips32.d | 16 ISA Extension: None
18 None
|
| D | elf_arch_mips5.d | 16 ISA Extension: None
18 None
|
| D | elf_arch_mips64r2.d | 16 ISA Extension: None
18 None
|
| D | elf_arch_mips32r5.d | 16 ISA Extension: None
18 None
|
| D | module-override.d | 16 ISA Extension: None
18 None
|