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Searched refs:OPCODE (Results 1 – 12 of 12) sorted by relevance

/toolchain/binutils/binutils-2.25/include/opcode/
Dh8300.h617 #define EXPAND2_STD_IMM(CODE, WEIGHT, NAME, SRC, PREFIX, OPCODE, IGN, IMMLIST) \ argument
618 …{CODE, AV_H8SX, 0, NAME, {{SRC, RDPOSTINC, E}}, {{PREFIX, TO_POSTINC, OPCODE, IGN, IMMLIST, E}}}, \
619 …{CODE, AV_H8SX, 0, NAME, {{SRC, RDPOSTDEC, E}}, {{PREFIX, TO_POSTDEC, OPCODE, IGN, IMMLIST, E}}}, \
620 …{CODE, AV_H8SX, 0, NAME, {{SRC, RDPREINC, E}}, {{PREFIX, TO_PREINC, OPCODE, IGN, IMMLIST, E}}}, \
621 …{CODE, AV_H8SX, 0, NAME, {{SRC, RDPREDEC, E}}, {{PREFIX, TO_PREDEC, OPCODE, IGN, IMMLIST, E}}}, \
622 …{CODE, AV_H8SX, 0, NAME, {{SRC, DISP2DST, E}}, {{PREFIX, TO_DISP2, OPCODE, IGN, IMMLIST, E}}}, \
623 …{CODE, AV_H8SX, 0, NAME, {{SRC, DISP16DST, E}}, {{PREFIX, TO_DISP16, OPCODE, IGN, DSTDISP16LIST, …
624 …{CODE, AV_H8SX, 0, NAME, {{SRC, DISP32DST, E}}, {{PREFIX, TO_DISP32, OPCODE, IGN, DSTDISP32LIST, …
625 …{CODE, AV_H8SX, 0, NAME, {{SRC, INDEXB16D, E}}, {{PREFIX, TO_DISP16B, OPCODE, IGN, DSTDISP16LIST, …
626 …{CODE, AV_H8SX, 0, NAME, {{SRC, INDEXW16D, E}}, {{PREFIX, TO_DISP16W, OPCODE, IGN, DSTDISP16LIST, …
[all …]
Dspu.h72 #define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \ argument
74 #define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \ argument
/toolchain/binutils/binutils-2.25/opcodes/
Dspu-opc.c35 #define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \ argument
36 { MACFORMAT, OPCODE, MNEMONIC, ASMFORMAT },
37 #define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \ argument
38 { MACFORMAT, OPCODE, MNEMONIC, ASMFORMAT },
Davr-dis.c39 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ argument
40 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
Darc-dis.c62 #define OPCODE(word) (BITS ((word), 27, 31)) macro
558 state->_opcode = OPCODE (state->words[0]); in dsmOneArcInst()
/toolchain/binutils/binutils-2.25/gas/config/
Dtc-rl78.c948 #define OPCODE(type,size) ((type) * 16 + (size)) macro
1008 switch (OPCODE (rl78_opcode_type (fragP->fr_opcode), fragP->fr_subtype)) in md_convert_frag()
1011 case OPCODE (OT_bt, 3): /* BT A,$ - no change. */ in md_convert_frag()
1016 case OPCODE (OT_bt, 6): /* BT A,$ - long version. */ in md_convert_frag()
1028 case OPCODE (OT_bt_sfr, 4): /* BT PSW,$ - no change. */ in md_convert_frag()
1033 case OPCODE (OT_bt_sfr, 7): /* BT PSW,$ - long version. */ in md_convert_frag()
1045 case OPCODE (OT_bt_es, 4): /* BT ES:[HL],$ - no change. */ in md_convert_frag()
1050 case OPCODE (OT_bt_es, 7): /* BT PSW,$ - long version. */ in md_convert_frag()
1062 case OPCODE (OT_bc, 2): /* BC $ - no change. */ in md_convert_frag()
1067 case OPCODE (OT_bc, 5): /* BC $ - long version. */ in md_convert_frag()
[all …]
Dtc-rx.c1720 #define OPCODE(type,size) ((type) * 16 + (size)) macro
1817 switch (OPCODE (rx_opcode_type (fragP->fr_opcode), fragP->fr_subtype)) in md_convert_frag()
1819 case OPCODE (OT_bra, 1): /* BRA.S - no change. */ in md_convert_frag()
1822 case OPCODE (OT_bra, 2): /* BRA.B - 8 bit. */ in md_convert_frag()
1828 case OPCODE (OT_bra, 3): /* BRA.W - 16 bit. */ in md_convert_frag()
1840 case OPCODE (OT_bra, 4): /* BRA.A - 24 bit. */ in md_convert_frag()
1855 case OPCODE (OT_beq, 1): /* BEQ.S - no change. */ in md_convert_frag()
1858 case OPCODE (OT_beq, 2): /* BEQ.B - 8 bit. */ in md_convert_frag()
1864 case OPCODE (OT_beq, 3): /* BEQ.W - 16 bit. */ in md_convert_frag()
1876 case OPCODE (OT_beq, 5): /* BEQ.A - synthetic. */ in md_convert_frag()
[all …]
Dtc-spu.c28 #define APUOP(TAG,MACFORMAT,OPCODE,MNEMONIC,ASMFORMAT,DEP,PIPE) \ argument
29 { MACFORMAT, (OPCODE) << (32-11), MNEMONIC, ASMFORMAT },
30 #define APUOPFB(TAG,MACFORMAT,OPCODE,FB,MNEMONIC,ASMFORMAT,DEP,PIPE) \ argument
31 { MACFORMAT, ((OPCODE) << (32-11)) | ((FB) << (32-18)), MNEMONIC, ASMFORMAT },
Dtc-avr.c40 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ argument
41 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
Dtc-hppa.c1010 #define INSERT_FIELD_AND_CONTINUE(OPCODE, FIELD, START) \ argument
1012 ((OPCODE) |= (FIELD) << (START)); \
/toolchain/binutils/binutils-2.25/gas/doc/
Dc-vax.texi257 @kbd{@var{OPCODE} @dots{}}
260 @var{OPCODE} @dots{}, foo ;
272 @kbd{@var{OPCODE} @dots{}}
275 @var{OPCODE} @dots{}, foo ;
282 @var{OPCODE} @dots{}, foo ;
294 @kbd{@var{OPCODE} @dots{}}
297 @var{OPCODE} @dots{}, foo ;
304 @var{OPCODE} @dots{}, foo ;
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
Dx86-64-opcode.s3 # O16 A32 OV REX OPCODE ; NOTES