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/toolchain/binutils/binutils-2.25/binutils/testsuite/binutils-all/windres/
Dmsupdate26 RC="rc"
29 RC="$1"
37 $RC /fo$o $i
Dversion_mlang.rc19 VALUE "FileDescription", "RC compiler."
30 VALUE "FileDescription", "Kompilator RC."
Dversion_small.rc19 VALUE "FileDescription", "RC compiler."
Dversion.rc19 VALUE "FileDescription", "RC compiler."
Dversion_cat.rc19 VALUE "File" "Description", L"RC " L"compiler."
DREADME6 dumps of the RES formatted output of MSVC's RC utility.
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
Dx86-64-avx512f-nondef.s4 # vrndscalesd {sae}, $123, %xmm4, %xmm5, %xmm6{%k7} # with null RC
6 # vrndscalesd {sae}, $123, %xmm4, %xmm5, %xmm6{%k7} # with not-null RC
Davx512f-nondef.s4 # vrndscalesd {sae}, $123, %xmm4, %xmm5, %xmm6{%k7} # with null RC
6 # vrndscalesd {sae}, $123, %xmm4, %xmm5, %xmm6{%k7} # with not-null RC
/toolchain/binutils/binutils-2.25/opcodes/
Dalpha-opc.c210 #define RC (RB + 1) macro
214 #define FA (RC + 1)
418 #define ARG_OPRLZ1 { ZA, LIT, RC }
563 { "clr", OPR(0x11,0x20), BASE, { ZA, ZB, RC } }, /* pseudo */
564 { "mov", OPR(0x11,0x20), BASE, { ZA, RB, RC } }, /* pseudo */
565 { "mov", OPR(0x11,0x20), BASE, { RA, RBA, RC } }, /* pseudo */
566 { "mov", OPRL(0x11,0x20), BASE, { ZA, LIT, RC } }, /* pseudo */
596 0xFFFFFFE0, BASE, { RC } }, /* ev56 but */
1310 { "ftoit", FP(0x1C, 0x70), CIX, { FA, ZB, RC } },
1311 { "ftois", FP(0x1C, 0x78), CIX, { FA, ZB, RC } },
Dmt-opc.c543 …{ { MNEM, ' ', OP (FRSR1), ',', OP (FRSR2), ',', '#', OP (RC), ',', '#', OP (RCNUM), ',', '#', OP …
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic4x/
Dregisters.s41 ldi R0,RC
/toolchain/binutils/binutils-2.25/gas/
DChangeLog-2013650 (i386_intel_operand): Handle RC/SAE, vector operations and
683 broadcasting or RC/SAE.
694 (output_imm): Handle RC/SAE immediates properly.
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic54x/
Dall-opcodes.s63952 ; RC : RC cond7 : 159
63953 RC UNC ; 1
63954 RC ALT ; 2
63955 RC BLT ; 3
63956 RC ALEQ ; 4
63957 RC BLEQ ; 5
63958 RC AGT ; 6
63959 RC BGT ; 7
63960 RC ANEQ ; 8
63961 RC BNEQ ; 9
[all …]
/toolchain/binutils/binutils-2.25/gas/doc/
Dc-i386.texi322 EVEX instructions. @option{-mevexrcig=@var{rne}} will encode RC bits
326 with 01, 10 and 11 RC bits, respectively.
/toolchain/binutils/binutils-2.25/
Dlibtool.m4805 [Windows Resource], [_LT_LANG(RC)],
854 [LT_LANG(RC)],
855 [m4_define([LT_PROG_RC], defn([LT_PROG_RC])[LT_LANG(RC)])])
7008 # Source file extension for RC test sources.
7011 # Object file extension for compiled RC test sources.
7032 CC=${RC-"windres"}
7068 [AC_CHECK_TOOL(RC, windres,)
/toolchain/binutils/binutils-2.25/binutils/
DChangeLog-2007688 * resrc.c: Likewise. Dumps as RC are now recompilable.
/toolchain/binutils/binutils-2.25/gas/po/
Duk.po7001 msgid "RC/SAE operand must precede immediate operands"
7002 msgstr "операнд RC/SAE має передувати операндам пришвидшеного використання"
7005 msgid "RC/SAE operand must follow immediate operands"
7006 msgstr "операнд RC/SAE має бути вказано після операндів пришвидшеного використання"
Dgas.pot7069 msgid "RC/SAE operand must precede immediate operands"
7073 msgid "RC/SAE operand must follow immediate operands"
7522 " encode EVEX instructions with specific EVEX.RC "