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Searched refs:RS (Results 1 – 25 of 36) sorted by relevance

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/toolchain/binutils/binutils-2.25/include/opcode/
Di960.h109 #define RS OP( 0, 0, 0, SFR ) macro
232 { 0x30000000, "bbc", I_BASE, COBR, 3, { RL, RS, 0 } },
233 { 0x31000000, "cmpobg", I_BASE, COBR, 3, { RL, RS, 0 } },
234 { 0x32000000, "cmpobe", I_BASE, COBR, 3, { RL, RS, 0 } },
235 { 0x33000000, "cmpobge", I_BASE, COBR, 3, { RL, RS, 0 } },
236 { 0x34000000, "cmpobl", I_BASE, COBR, 3, { RL, RS, 0 } },
237 { 0x35000000, "cmpobne", I_BASE, COBR, 3, { RL, RS, 0 } },
238 { 0x36000000, "cmpoble", I_BASE, COBR, 3, { RL, RS, 0 } },
239 { 0x37000000, "bbs", I_BASE, COBR, 3, { RL, RS, 0 } },
240 { 0x38000000, "cmpibno", I_BASE, COBR, 3, { RL, RS, 0 } },
[all …]
/toolchain/binutils/binutils-2.25/opcodes/
Dh8500-opc.h145 #define RS 39 macro
199 {6,'-','X','!','!',O_XCH|O_WORD,"xch.w",2,{RS,RD},2, {{0xa8,0xf8,RS },{0x90,0xf8,RD }}},
200 {7,'-','X','!','!',O_XCH|O_UNSZ,"xch",2,{RS,RD},2, {{0xa8,0xf8,RS },{0x90,0xf8,RD }}},
474 {44,'-','B','S','S',O_SCB_NE|O_UNSZ,"scb/ne",2,{RS,PCREL8},3, {{0x06,0xff,0 },{0xb8,0xf8,RS },{0x00…
475 {45,'-','B','S','S',O_SCB_F|O_UNSZ,"scb/f",2,{RS,PCREL8},3, {{0x01,0xff,0 },{0xb8,0xf8,RS },{0x00,0…
476 {46,'-','B','S','S',O_SCB_EQ|O_UNSZ,"scb/eq",2,{RS,PCREL8},3, {{0x07,0xff,0 },{0xb8,0xf8,RS },{0x00…
708 …81,'-','S','!','E',O_MOVTPE|O_BYTE,"movtpe.b",2,{RS,RN},3, {{0xa0,0xf8,RN },{0x00,0xff,0 },{0x90,0…
709 …,'-','S','!','E',O_MOVTPE|O_BYTE,"movtpe.b",2,{RS,RNDEC},3, {{0xb0,0xf8,RN },{0x00,0xff,0 },{0x90,…
710 …,'-','S','!','E',O_MOVTPE|O_BYTE,"movtpe.b",2,{RS,RNINC},3, {{0xc0,0xf8,RN },{0x00,0xff,0 },{0x90,…
711 …,'-','S','!','E',O_MOVTPE|O_BYTE,"movtpe.b",2,{RS,RNIND},3, {{0xd0,0xf8,RN },{0x00,0xff,0 },{0x90,…
[all …]
Diq2000-opc.c248 { { MNEM, ' ', OP (RD), ',', OP (RS), ',', OP (RT), 0 } },
260 { { MNEM, ' ', OP (RT), ',', OP (RS), ',', OP (LO16), 0 } },
272 { { MNEM, ' ', OP (RT), ',', OP (RS), ',', OP (LO16), 0 } },
284 { { MNEM, ' ', OP (RD), ',', OP (RS), ',', OP (RT), 0 } },
296 { { MNEM, ' ', OP (RD), ',', OP (RS), ',', OP (RT), 0 } },
308 { { MNEM, ' ', OP (RD), ',', OP (RS), ',', OP (RT), 0 } },
320 { { MNEM, ' ', OP (RT), ',', OP (RS), ',', OP (LO16), 0 } },
332 { { MNEM, ' ', OP (RT), ',', OP (RS), ',', OP (LO16), 0 } },
344 { { MNEM, ' ', OP (RD), ',', OP (RS), ',', OP (RT), 0 } },
356 { { MNEM, ' ', OP (RD), ',', OP (RS), ',', OP (RT), 0 } },
[all …]
Dppc-opc.c516 #define RS RBOPT + 1 macro
517 #define RT RS
519 #define RD RS
524 #define RSQ RS + 1
2987 {"evaddw", VX (4, 512), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
2989 {"evaddiw", VX (4, 514), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RB, UIMM}},
2991 {"evsubfw", VX (4, 516), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}},
2992 {"evsubw", VX (4, 516), VX_MASK, PPCSPE, PPCNONE, {RS, RB, RA}},
2994 {"evsubifw", VX (4, 518), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, UIMM, RB}},
2995 {"evsubiw", VX (4, 518), VX_MASK, PPCSPE, PPCNONE, {RS, RB, UIMM}},
[all …]
Dxstormy16-opc.c214 { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), ')', 0 } },
220 { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), '+', '+', ')', 0 } },
226 { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', '-', '-', OP (RS), ')', 0 } },
232 { { MNEM, OP (WS2), ' ', '(', OP (RS), ')', ',', OP (RDM), 0 } },
238 { { MNEM, OP (WS2), ' ', '(', OP (RS), '+', '+', ')', ',', OP (RDM), 0 } },
244 { { MNEM, OP (WS2), ' ', '(', '-', '-', OP (RS), ')', ',', OP (RDM), 0 } },
250 { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), ',', OP (IMM12), ')', 0 } },
256 { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), '+', '+', ',', OP (IMM12), ')', 0 } },
262 { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', '-', '-', OP (RS), ',', OP (IMM12), ')', 0 } },
268 { { MNEM, OP (WS2), ' ', '(', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
[all …]
Di370-opc.c361 #define RS(op, r1, b3, b2, d2) \ macro
367 #define RS_MASK RS (0xff, 0x0, 0x0, 0x0, 0x0)
754 { "bxh", 4, {{RS(0x86,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_R3, RS_D2, RS_B2} },
755 { "bxle", 4, {{RS(0x87,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_R3, RS_D2, RS_B2} },
756 { "cds", 4, {{RS(0xbb,0,0,0,0), 0}}, {{RS_MASK, 0}}, IXA, {RX_R1, RS_R3, RS_D2, RS_B2} },
757 { "clcle", 4, {{RS(0xa9,0,0,0,0), 0}}, {{RS_MASK, 0}}, ICM, {RX_R1, RS_R3, RS_D2, RS_B2} },
758 { "clm", 4, {{RS(0xbd,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_R3, RS_D2, RS_B2} },
759 { "cs", 4, {{RS(0xba,0,0,0,0), 0}}, {{RS_MASK, 0}}, IXA, {RX_R1, RS_R3, RS_D2, RS_B2} },
760 { "icm", 4, {{RS(0xbf,0,0,0,0), 0}}, {{RS_MASK, 0}}, I370, {RX_R1, RS_R3, RS_D2, RS_B2} },
761 { "lam", 4, {{RS(0x9a,0,0,0,0), 0}}, {{RS_MASK, 0}}, IESA, {RX_R1, RS_R3, RS_D2, RS_B2} },
[all …]
Dh8500-dis.c129 case RS: in print_insn_h8500()
245 case RS: in print_insn_h8500()
DChangeLog-020325 (RAO, RSO, SHO): New optional forms of RA, RS, SH operands.
205 Move duplicate mnemonic entries together. Use RS instead of RT on
951 (mtspefscr): Change RT to RS in opcode table.
989 Change all RD to RS.
1163 * ppc-opc.c: Change RD to RS for evmerge*.
DChangeLog-92973190 opcodes for POWER (RS/6000).
3191 * ppc-dis.c: New file. PowerPC and Power (RS/6000) disassembler.
/toolchain/binutils/binutils-2.25/cpu/
Diq10.cpu27 (dni andoui-q10 "iq10 and upper ones immediate" (MACH10 USES-RS USES-RT)
33 (dni andoui2-q10 "iq10 and upper ones immediate" (ALIAS NO-DIS MACH10 USES-RS USES-RT)
39 (dni orui-q10 "or upper immediate" (MACH10 USES-RS USES-RT)
45 (dni orui2-q10 "or upper immediate" (ALIAS NO-DIS MACH10 USES-RS USES-RT)
51 (dni mrgbq10 "merge bytes" (MACH10 USES-RD USES-RS USES-RT)
70 (dni mrgbq102 "merge bytes" (ALIAS NO-DIS MACH10 USES-RD USES-RS USES-RT)
122 (dni bbil "branch bit immediate likely" (MACH10 USES-RS)
130 (dni bbinl "branch bit immediate negated likely" (MACH10 USES-RS)
138 (dni bbvl "branch bit variable likely" (MACH10 USES-RS USES-RT)
146 (dni bbvnl "branch bit variable negated likely" (MACH10 USES-RS USES-RT)
[all …]
Diq2000.cpu450 (dni add2 "add registers" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
456 (dni add "add registers" (USES-RD USES-RS USES-RT)
463 (dni addi2 "add immediate" (ALIAS NO-DIS USES-RS USES-RT)
469 (dni addi "add immediate" (USES-RS USES-RT)
475 (dni addiu2 "add immediate unsigned" (ALIAS NO-DIS USES-RS USES-RT)
481 (dni addiu "add immediate unsigned" (USES-RS USES-RT)
487 (dni addu2 "add unsigned" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
493 (dni addu "add unsigned" (USES-RD USES-RS USES-RT)
499 (dni ado162 "add 16, ones complement" (ALIAS NO-DIS USES-RD USES-RS USES-RT)
508 (dni ado16 "add 16, ones complement" (USES-RD USES-RS USES-RT)
[all …]
Diq2000m.cpu24 (dni andoui "and upper ones immediate" (MACH2000 USES-RS USES-RT)
30 (dni andoui2 "and upper ones immediate" (ALIAS NO-DIS MACH2000 USES-RS USES-RT)
36 (dni orui2 "or upper immediate" (ALIAS NO-DIS MACH2000 USES-RS USES-RT)
42 (dni orui "or upper immediate" (MACH2000 USES-RS USES-RT)
48 (dni bgtz "branch if greater than zero" (MACH2000 USES-RS)
56 (dni bgtzl "branch if greater than zero likely" (MACH2000 USES-RS)
64 (dni blez "branch if less than or equal to zero" (MACH2000 USES-RS)
71 (dni blezl "branch if less than or equal to zero likely" (MACH2000 USES-RS)
80 (dni mrgb "merge bytes" (MACH2000 USES-RD USES-RS USES-RT)
99 (dni mrgb2 "merge bytes" (ALIAS NO-DIS MACH2000 USES-RD USES-RS USES-RT)
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic4x/
Dregisters.s39 ldi R0,RS
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/sh/arch/
Dsh3-dsp.s58 …ldc r4,RS ;!/* 0100nnnn01101110 ldc <REG_N>,RS */{"ldc",{A_REG_N,A_RS},{HEX_4,…
67 …ldc.l @r4+,RS ;!/* 0100nnnn01100111 ldc.l @<REG_N>+,RS */{"ldc.l",{A_INC_N,A_RS},{HEX_…
173 …stc RS,r4 ;!/* 0000nnnn01100010 stc RS,<REG_N> */{"stc",{A_RS,A_REG_N},{HEX_0,…
181 …stc.l RS,@-r4 ;!/* 0100nnnn01100011 stc.l RS,@-<REG_N> */{"stc.l",{A_RS,A_DEC_N},{HEX…
Dsh-dsp.s17 …ldc r4,RS ;!/* 0100nnnn01101110 ldc <REG_N>,RS */{"ldc",{A_REG_N,A_RS},{HEX_4,…
20 …ldc.l @r4+,RS ;!/* 0100nnnn01100111 ldc.l @<REG_N>+,RS */{"ldc.l",{A_INC_N,A_RS},{HEX_…
41 …stc RS,r4 ;!/* 0000nnnn01100010 stc RS,<REG_N> */{"stc",{A_RS,A_REG_N},{HEX_0,…
44 …stc.l RS,@-r4 ;!/* 0100nnnn01100011 stc.l RS,@-<REG_N> */{"stc.l",{A_RS,A_DEC_N},{HEX…
Dsh4al-dsp.s96 …ldc r4,RS ;!/* 0100nnnn01101110 ldc <REG_N>,RS */{"ldc",{A_REG_N,A_RS},{HEX_4,…
107 …ldc.l @r4+,RS ;!/* 0100nnnn01100111 ldc.l @<REG_N>+,RS */{"ldc.l",{A_INC_N,A_RS},{HEX_…
224 …stc RS,r4 ;!/* 0000nnnn01100010 stc RS,<REG_N> */{"stc",{A_RS,A_REG_N},{HEX_0,…
234 …stc.l RS,@-r4 ;!/* 0100nnnn01100011 stc.l RS,@-<REG_N> */{"stc.l",{A_RS,A_DEC_N},{HEX…
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-sh/arch/
Dsh-dsp.s17 …ldc r4,RS ;!/* 0100nnnn01101110 ldc <REG_N>,RS */{"ldc",{A_REG_N,A_RS},{HEX_4,…
20 …ldc.l @r4+,RS ;!/* 0100nnnn01100111 ldc.l @<REG_N>+,RS */{"ldc.l",{A_INC_N,A_RS},{HEX_…
41 …stc RS,r4 ;!/* 0000nnnn01100010 stc RS,<REG_N> */{"stc",{A_RS,A_REG_N},{HEX_0,…
44 …stc.l RS,@-r4 ;!/* 0100nnnn01100011 stc.l RS,@-<REG_N> */{"stc.l",{A_RS,A_DEC_N},{HEX…
Dsh3-dsp.s58 …ldc r4,RS ;!/* 0100nnnn01101110 ldc <REG_N>,RS */{"ldc",{A_REG_N,A_RS},{HEX_4,…
67 …ldc.l @r4+,RS ;!/* 0100nnnn01100111 ldc.l @<REG_N>+,RS */{"ldc.l",{A_INC_N,A_RS},{HEX_…
173 …stc RS,r4 ;!/* 0000nnnn01100010 stc RS,<REG_N> */{"stc",{A_RS,A_REG_N},{HEX_0,…
181 …stc.l RS,@-r4 ;!/* 0100nnnn01100011 stc.l RS,@-<REG_N> */{"stc.l",{A_RS,A_DEC_N},{HEX…
Dsh4al-dsp.s96 …ldc r4,RS ;!/* 0100nnnn01101110 ldc <REG_N>,RS */{"ldc",{A_REG_N,A_RS},{HEX_4,…
107 …ldc.l @r4+,RS ;!/* 0100nnnn01100111 ldc.l @<REG_N>+,RS */{"ldc.l",{A_INC_N,A_RS},{HEX_…
224 …stc RS,r4 ;!/* 0000nnnn01100010 stc RS,<REG_N> */{"stc",{A_RS,A_REG_N},{HEX_0,…
234 …stc.l RS,@-r4 ;!/* 0100nnnn01100011 stc.l RS,@-<REG_N> */{"stc.l",{A_RS,A_DEC_N},{HEX…
/toolchain/binutils/binutils-2.25/gas/
DCONTRIBUTORS70 Meissner's mips-tfile program, wrote the PowerPC and RS/6000 support,
DNEWS491 * RS/6000 and PowerPC support by Ian Taylor.
529 * RS/6000 AIX and MIPS SGI Irix 5 support has been added.
/toolchain/binutils/binutils-2.25/gas/doc/
Dc-i370.texi146 Use @var{regno} as the base register for all subsequent RX, RS, and SS form
Dc-s390.texi409 @item RS format: <insn> R1,R3,D2(B2)
/toolchain/binutils/binutils-2.25/include/coff/
DChangeLog-91031015 Change C_EFCN to 0xff, change RS/6000 dbx symbols
1077 RS/6000.
/toolchain/binutils/binutils-2.25/binutils/
DNEWS438 * Support for HP-PA (by Jeff Law), i386 Mach (by David Mackenzie), RS/6000 and

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