Searched refs:ShiftCount (Results 1 – 7 of 7) sorted by relevance
/toolchain/binutils/binutils-2.25/opcodes/ |
D | i386-opc.h | 684 ShiftCount, enumerator
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D | i386-reg.tbl | 25 cl, Reg8|ShiftCount, 0, 1, Dw2Inval, Dw2Inval
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D | i386-gen.c | 548 BITFIELD (ShiftCount),
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D | ChangeLog-2007 | 843 (ShiftCount): Likewise.
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D | i386-opc.tbl | 274 rol, 2, 0xd2, 0x0, 1, 0, W|CheckRegSize|Modrm|No_sSuf|No_ldSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg6… 279 ror, 2, 0xd2, 0x1, 1, 0, W|CheckRegSize|Modrm|No_sSuf|No_ldSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg6… 284 rcl, 2, 0xd2, 0x2, 1, 0, W|CheckRegSize|Modrm|No_sSuf|No_ldSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg6… 289 rcr, 2, 0xd2, 0x3, 1, 0, W|CheckRegSize|Modrm|No_sSuf|No_ldSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg6… 294 sal, 2, 0xd2, 0x4, 1, 0, W|CheckRegSize|Modrm|No_sSuf|No_ldSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg6… 299 shl, 2, 0xd2, 0x4, 1, 0, W|CheckRegSize|Modrm|No_sSuf|No_ldSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg6… 304 shr, 2, 0xd2, 0x5, 1, 0, W|CheckRegSize|Modrm|No_sSuf|No_ldSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg6… 309 sar, 2, 0xd2, 0x7, 1, 0, W|CheckRegSize|Modrm|No_sSuf|No_ldSuf, { ShiftCount, Reg8|Reg16|Reg32|Reg6… 313 shld, 3, 0xfa5, None, 2, Cpu386, Modrm|CheckRegSize|No_bSuf|No_sSuf|No_ldSuf, { ShiftCount, Reg16|R… 317 shrd, 3, 0xfad, None, 2, Cpu386, Modrm|CheckRegSize|No_bSuf|No_sSuf|No_ldSuf, { ShiftCount, Reg16|R…
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/toolchain/binutils/binutils-2.25/gas/ |
D | ChangeLog-2006 | 3 * config/tc-i386.h (ShiftCount): Fix a comment typo.
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D | ChangeLog-0001 | 3741 InOutPortReg,ShiftCount, Control, Debug, Test, FloatReg, FloatAcc,
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