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/toolchain/binutils/binutils-2.25/gas/doc/
Dc-ia64.texi35 This option instructs the assembler to mark the resulting object file
39 emitted by the assembler. All it does is turn on the EF_IA_64_CONS_GP
43 This option instructs the assembler to mark the resulting object file
51 affect the machine code emitted by the assembler. All it does is
58 These options select the data model. The assembler defaults to @code{-mlp64}
74 These options control what the assembler will do when performing
76 will make the assembler issue a warning when an unwind directive check
78 assembler issue an error when an unwind directive check fails.
83 These options control what the assembler will do when the @samp{hint.b}
84 instruction is used. @code{-mhint.b=ok} will make the assembler accept
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Dc-rx.texi74 This option tells the assembler that the small data limit feature of
75 the RX port of GCC is being used. This results in the assembler
83 This option tells the assembler that the position independent data of the
84 RX port of GCC is being used. This results in the assembler
91 This option tells the assembler how many registers have been reserved
97 This option tells the assembler that the old GCC ABI is being used by
103 This option tells the assembler that the official RX ABI is being used
110 This option tells the assembler the target CPU type. Currently the
124 The assembler supports one modifier when using symbol addresses
140 The assembler also supports two meta register names which can be used
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Dc-m68hc11.texi36 This option switches the assembler into the M68HC11 mode. In this mode,
37 the assembler only accepts 68HC11 operands and mnemonics. It produces
42 This option switches the assembler into the M68HC12 mode. In this mode,
43 the assembler also accepts 68HC12 operands and mnemonics. It produces
49 This option switches the assembler into the M68HCS12 mode. This mode is
56 This option switches the assembler into the M9S12X mode. This mode is
62 This option switches the assembler into the XGATE mode for the RISC
180 The M68HC11 assembler does not currently support a line separator
211 @samp{PC}. The assembler will use the smaller post-byte definition
214 the assembler it will use the 16-bit constant offset post-byte and the value
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Dc-score.texi70 Generate code for PIC. This option tells the assembler to generate
72 assembler to mark the output file as PIC.
87 A number of assembler directives are available for SCORE. The
92 Let the assembler not to generate warnings if the source machine
96 Let the assembler to insert bubbles (32 bit nop instruction /
101 Let the assembler to generate warnings if the source machine
105 Let the assembler not to generate warnings if the source program
109 Let the assembler to generate warnings if the source program uses
113 Tell the assembler to add subsequent data into the sdata section
116 Tell the assembler to add subsequent data into the rdata section
Dc-m32r.texi54 This option can be used to restore the assembler's default behaviour of
60 This option tells the assembler to produce little-endian code and
70 This option tells the assembler to produce big-endian code and
80 This option specifies that the output of the assembler should be
85 This option tells the assembler to attempts to combine two sequential
101 This option tells the assembler to attempt to optimize the
135 This option tells the assembler's to stop checking parallel
142 This option restores the assembler's default behaviour of checking
157 This option tells the assembler to produce a warning message if a
260 line option. It tells the assembler to only accept M32R instructions
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Dc-xtensa.texi17 This chapter covers features of the @sc{gnu} assembler that are specific
54 Indicate to the assembler whether @code{L32R} instructions use absolute
66 that the assembler will always align instructions like @code{LOOP} that
83 Enable or disable all assembler transformations of Xtensa instructions,
110 @cindex syntax, Xtensa assembler
111 @cindex Xtensa assembler syntax
154 The assembler will automatically search for a format that can encode the
165 specified as part of a FLIX bundle, the assembler will choose the
190 opcode produced by the assembler. Using this feature unnecessarily
191 makes the code less efficient by disabling assembler optimization and
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Dc-mips.texi68 Generate SVR4-style PIC. This option tells the assembler to generate
70 assembler to mark the output file as PIC.
74 Generate VxWorks PIC. This option tells the assembler to generate
172 This tells the assembler to accept MIPS-3D instructions.
178 This tells the assembler to accept MDMX instructions.
184 This tells the assembler to accept DSP Release 1 instructions.
191 This tells the assembler to accept DSP Release 2 instructions.
197 This tells the assembler to accept MT instructions.
203 This tells the assembler to accept MCU instructions.
209 This tells the assembler to accept MSA instructions.
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Dc-mmix.texi80 assembler and linker, while @code{@value{AS}} will expand instructions
255 @cindex assembler directives, MMIX
257 @cindex MMIX assembler directives
262 @cindex assembler directive LOC, MMIX
264 @cindex MMIX assembler directive LOC
291 @cindex assembler directive LOCAL, MMIX
293 @cindex MMIX assembler directive LOCAL
312 @cindex assembler directive IS, MMIX
314 @cindex MMIX assembler directive IS
330 @cindex assembler directive GREG, MMIX
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Dc-aarch64.texi39 This option specifies that the output generated by the assembler should
44 This option specifies that the output generated by the assembler should
55 This option specifies the target processor. The assembler will issue an error
63 The special name @code{all} may be used to allow the assembler to accept
67 In addition to the basic instruction set, the assembler can be told to
78 This option specifies the target architecture. The assembler will
84 assembler will use the setting for @option{-mcpu}. If neither are
85 specified, the assembler will default to @option{-mcpu=all}.
108 supported by the assembler and the conditions under which they are
112 Extension mnemonics may also be removed from those the assembler
Dc-hppa.texi28 assembler so that you can debug the final executable.
41 The assembler syntax closely follows the HPPA instruction set
42 reference manual; assembler directives and general syntax closely follow the
54 similar oversights than the HP assembler. @code{@value{AS}} notifies you
80 compatibility with the native assembler. This section describes them only
81 briefly. For detailed information on HPPA-specific assembler directives, see
85 @code{@value{AS}} does @emph{not} support the following assembler directives
97 additional assembler directive for the HPPA: @code{.param}. It conveys
144 Not yet supported; the assembler rejects programs containing this directive.
180 Not yet supported; the assembler rejects programs containing this directive.
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Dc-tilepro.texi45 which the assembler is free to combine into VLIW bundles, or specify
60 specified than the hardware supports in a bundle, the assembler
63 The assembler will prefer to preserve the ordering of instructions
70 assembler will automatically try to find a valid pipeline
72 the assembler reports an error.
74 The assembler does not yet auto-bundle (automatically combine multiple
139 The assembler will emit a warning if a numeric name is used instead of
141 assembler pseudo-op turns off this
149 The assembler supports several modifiers when using symbol addresses
Dc-d30v.texi70 How does the assembler pick the correct form? @code{@value{AS}} will always pick the
73 assembler to use either the short or long form of the instruction, you can append
84 The D30V assembler takes as input a series of instructions, either one-per-line,
87 into a single instruction. The assembler will do this automatically. It will also detect
93 If you do not want the assembler automatically making these decisions, you can control
148 used. If the @samp{-O} option is used, the assembler will determine if
151 The assembler will put them in the proper containers. In the above
152 example, the assembler will put the @samp{stw} instruction in left
160 The assembler will give an error if the machine ordering constraints are
Dall.texi13 @c Include text on assembler internals?
83 @c Does this version of the assembler use the difference-table kludge?
97 @c Name of the assembler:
Dc-tilegx.texi61 which the assembler is free to combine into VLIW bundles, or specify
76 specified than the hardware supports in a bundle, the assembler
79 The assembler will prefer to preserve the ordering of instructions
86 assembler will automatically try to find a valid pipeline
88 the assembler reports an error.
90 The assembler does not yet auto-bundle (automatically combine multiple
155 The assembler will emit a warning if a numeric name is used instead of
157 assembler pseudo-op turns off this
165 The assembler supports several modifiers when using symbol addresses
/toolchain/binutils/binutils-2.25/gas/
DNEWS9 * Enhanced the ARM port to accept the assembler output from the CodeComposer
27 * Remove assembler support for MIPS ECOFF targets.
78 * ARM assembler now supports .inst[.nw] pseudo-ops to insert opcodes specified
108 * New sub-option added to the assembler's -a command line switch to
110 various information about the assembly, such as assembler version, the
170 assembler.
215 * Added PIC m32r Linux (ELF) and support to M32R assembler.
224 specification has been added to the arm assembler.
238 * Added -n switch for x86 assembler. By default, x86 GAS replaces
243 * Removed -n option from MIPS assembler. It was not useful, and confused the
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DREADME14 To build just the assembler, make the target all-gas.
127 `--enable-bfd-assembler'
128 This causes the assembler to use the new code being merged into it to use
137 On a few targets, the assembler has been modified to support a feature
139 may confuse assembly language programmers. If assembler encounters a
142 bits, the assembler will create a branch around a long jump to
146 allows the assembler to assemble jump tables that jump to locations
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i860/
DREADME.i8602 Testsuite for the i860 version of the GNU assembler
5 This is a simple testsuite for the i860 assembler. It currently
15 Release 4 vendor assembler (/usr/ccs/bin/as -V reports version
17 way GAS/i860 is tested against a known good assembler.
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/msp430/
Dbad.s4 ;;; Test for the assembler detecting spurious size modifiers.
13 ;;; FIXME: Add more tests of assembler error detection here.
16 ;; might cause an interrupt to be missed. The assembler
/toolchain/binutils/binutils-2.25/opcodes/
Dscore-dis.c45 char *assembler; /* Disassembly string. */ member
520 for (insn = score_opcodes; insn->assembler; insn++) in print_insn_score48()
530 for (c = insn->assembler; *c; c++) in print_insn_score48()
679 for (insn = score_opcodes; insn->assembler; insn++) in print_insn_score32()
697 for (c = insn->assembler; *c; c++) in print_insn_score32()
886 for (insn = score_opcodes; insn->assembler; insn++) in print_insn_score16()
890 char *c = insn->assembler; in print_insn_score16()
Dscore7-dis.c52 char *assembler; /* Disassembly string. */ member
552 for (insn = score_opcodes; insn->assembler; insn++) in print_insn_score32()
558 for (c = insn->assembler; *c; c++) in print_insn_score32()
723 for (insn = score_opcodes; insn->assembler; insn++) in print_insn_score16()
727 char *c = insn->assembler; in print_insn_score16()
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/nios2/
Dselftest.d5 # Test the assembler self-test mode on some instructions that
7 # sure the assembler doesn't choke, rather than to match the encodings
Dwarn_noat.l2 .*warn_noat.s:2: Warning: Register at \(r1\) can sometimes be corrupted by assembler optimizations.
4 .*warn_noat.s:8: Warning: Register at \(r1\) can sometimes be corrupted by assembler optimizations.
/toolchain/binutils/binutils-2.25/config/
Dasmcfi.m44 [AC_CACHE_CHECK([assembler .cfi pseudo-op support],
13 [Define if your assembler supports .cfi_* directives.])
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/hppa/
DREADME9 assembler directives is handled correctly. If you're going to add
13 It should only be necessary to have an assembler to run these tests;
23 It should only be necessary to have an assembler to run these tests;
/toolchain/binutils/binutils-2.25/ld/testsuite/ld-sh/sh64/
Dcrange-2b.s3 ! generated by the assembler; two more needed at link time, as they will be
5 ! assembler-generated .cranges only and one without any .cranges.

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