| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| D | sb1-ext-mdmx.s | 3 # SB-1 implements only the .ob MDMX instructions, and adds three additional
22 add.ob $v1, $v12, 18
23 add.ob $v1, $v12, $v18
24 add.ob $v1, $v12, $v18[6]
26 adda.ob $v12, 18
27 adda.ob $v12, $v18
28 adda.ob $v12, $v18[6]
30 addl.ob $v12, 18
31 addl.ob $v12, $v18
32 addl.ob $v12, $v18[6]
[all …]
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| D | sb1-ext-mdmx.d | 14 0+0010 <[^>]*> 7bd2604b add\.ob \$v1,\$v12,0x12
15 0+0014 <[^>]*> 7ad2604b add\.ob \$v1,\$v12,\$v18
16 0+0018 <[^>]*> 7992604b add\.ob \$v1,\$v12,\$v18\[6\]
17 0+001c <[^>]*> 7bd26037 adda\.ob \$v12,0x12
18 0+0020 <[^>]*> 7ad26037 adda\.ob \$v12,\$v18
19 0+0024 <[^>]*> 79926037 adda\.ob \$v12,\$v18\[6\]
20 0+0028 <[^>]*> 7bd26437 addl\.ob \$v12,0x12
21 0+002c <[^>]*> 7ad26437 addl\.ob \$v12,\$v18
22 0+0030 <[^>]*> 79926437 addl\.ob \$v12,\$v18\[6\]
23 0+0034 <[^>]*> 78d26058 alni\.ob \$v1,\$v12,\$v18,6
[all …]
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| D | vr5400.d | 38 0+0078 <stuff\+0x78> add\.ob \$f0,\$f2,\$f4
39 0+007c <stuff\+0x7c> add\.ob \$f2,\$f4,\$f6\[2\]
40 0+0080 <stuff\+0x80> add\.ob \$f6,\$f4,0xf
41 0+0084 <stuff\+0x84> add\.ob \$f4,\$f6,0x1f
42 0+0088 <stuff\+0x88> and\.ob \$f0,\$f2,\$f4
43 0+008c <stuff\+0x8c> and\.ob \$f2,\$f4,\$f6\[2\]
44 0+0090 <stuff\+0x90> and\.ob \$f6,\$f4,0xf
45 0+0094 <stuff\+0x94> and\.ob \$f4,\$f6,0x1f
46 0+0098 <stuff\+0x98> c\.eq\.ob \$f0,\$f2
47 0+009c <stuff\+0x9c> c\.eq\.ob \$f4,\$f6\[2\]
[all …]
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| D | mips64-mdmx.s | 17 add.ob $v1, $v12, 18
18 add.ob $v1, $v12, $v18
19 add.ob $v1, $v12, $v18[6]
25 adda.ob $v12, 18
26 adda.ob $v12, $v18
27 adda.ob $v12, $v18[6]
33 addl.ob $v12, 18
34 addl.ob $v12, $v18
35 addl.ob $v12, $v18[6]
41 alni.ob $v1, $v12, $v18, 6
[all …]
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| D | mips64-mdmx.d | 14 0+0010 <[^>]*> 7bd2604b add\.ob \$v1,\$v12,0x12
15 0+0014 <[^>]*> 7ad2604b add\.ob \$v1,\$v12,\$v18
16 0+0018 <[^>]*> 7992604b add\.ob \$v1,\$v12,\$v18\[6\]
20 0+0028 <[^>]*> 7bd26037 adda\.ob \$v12,0x12
21 0+002c <[^>]*> 7ad26037 adda\.ob \$v12,\$v18
22 0+0030 <[^>]*> 79926037 adda\.ob \$v12,\$v18\[6\]
26 0+0040 <[^>]*> 7bd26437 addl\.ob \$v12,0x12
27 0+0044 <[^>]*> 7ad26437 addl\.ob \$v12,\$v18
28 0+0048 <[^>]*> 79926437 addl\.ob \$v12,\$v18\[6\]
32 0+0058 <[^>]*> 78d26058 alni\.ob \$v1,\$v12,\$v18,6
[all …]
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| D | vr5400.s | 76 nsel3 add.ob
77 nsel3 and.ob
78 nsel2 c.eq.ob
79 nsel2 c.le.ob
80 nsel2 c.lt.ob
81 nsel3 max.ob
82 nsel3 min.ob
83 nsel3 mul.ob
84 nsel2 mula.ob
85 nsel2 mull.ob
[all …]
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| D | set-arch.s | 411 nsel3 add.ob
412 nsel3 and.ob
413 nsel2 c.eq.ob
414 nsel2 c.le.ob
415 nsel2 c.lt.ob
416 nsel3 max.ob
417 nsel3 min.ob
418 nsel3 mul.ob
419 nsel2 mula.ob
420 nsel2 mull.ob
[all …]
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| D | vr5400-ill.s | 1 sll.ob $f2,$f4,4
2 sll.ob $f2,$f4,$f6[1]
3 sll.ob $f2,$f4,$f6
5 srl.ob $f2,$f4,4
6 srl.ob $f2,$f4,$f6[1]
7 srl.ob $f2,$f4,$f6
9 rzu.ob $f2,4
10 rzu.ob $f2,$f6[1]
11 rzu.ob $f2,$f6
13 add.ob $f2,$f4,$f6
[all …]
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| D | mips64-dsp.s | 16 addu.ob $9,$10,$11
17 addu_s.ob $10,$11,$12
26 cmpu.eq.ob $14,$15
27 cmpu.lt.ob $15,$16
28 cmpu.le.ob $16,$17
29 cmpgu.eq.ob $8,$9,$10
30 cmpgu.lt.ob $9,$10,$11
31 cmpgu.le.ob $10,$11,$12
104 pick.ob $25,$26,$27
121 precrq.ob.qh $4,$5,$6
[all …]
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| D | vr5400-ill.l | 2 .*:3: Error: operand 3 must be scalar `sll.ob \$f2,\$f4,\$f6'
4 .*:10: Error: operand 2 must be an immediate `rzu.ob \$f2,\$f6\[1\]'
6 .*:14: Error: invalid operands `add.ob \$v2,\$f4,\$f6'
8 .*:16: Error: invalid operands `add.ob \$f2,\$f4,\$v6'
10 .*:20: Error: invalid operands `add.ob \$v2,\$f4,\$f6\[1\]'
12 .*:22: Error: invalid operands `add.ob \$f2,\$f4,\$v6\[1\]'
14 .*:25: Error: vector element must be constant `add.ob \$f2,\$f4,\$f6\[foo\]'
15 .*:26: Error: missing `\]' `add.ob \$f2,\$f4,\$f6\[1}'
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| D | mips64-dsp.d | 16 0+0018 <[^>]*> 7d4b4814 addu\.ob t1,t2,t3
17 0+001c <[^>]*> 7d6c5114 addu_s\.ob t2,t3,t4
26 0+0040 <[^>]*> 7dcf0015 cmpu\.eq\.ob t6,t7
27 0+0044 <[^>]*> 7df00055 cmpu\.lt\.ob t7,s0
28 0+0048 <[^>]*> 7e110095 cmpu\.le\.ob s0,s1
29 0+004c <[^>]*> 7d2a4115 cmpgu\.eq\.ob t0,t1,t2
30 0+0050 <[^>]*> 7d4b4955 cmpgu\.lt\.ob t1,t2,t3
31 0+0054 <[^>]*> 7d6c5195 cmpgu\.le\.ob t2,t3,t4
104 0+0178 <[^>]*> 7f5bc8d5 pick\.ob t9,k0,k1
121 0+01bc <[^>]*> 7ca62315 precrq\.ob\.qh a0,a1,a2
[all …]
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| D | ase-errors-2.s | 40 add.ob $f4,$f6,$f8 # OK
42 add.ob $f4,$f6,$f8 # OK
44 add.ob $f4,$f6,$f8 # ERROR: mdmx not enabled
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| D | ase-errors-1.s | 47 add.ob $f4,$f6,$f8 # OK
49 add.ob $f4,$f6,$f8 # OK
51 add.ob $f4,$f6,$f8 # ERROR: mdmx not enabled
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| D | ase-errors-4.l | 13 .*:30: Error: unrecognized opcode `add.ob \$f4,\$f6,\$f8'
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| D | ase-errors-1.l | 23 .*:51: Error: opcode not supported.* `add.ob \$f4,\$f6,\$f8'
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| /toolchain/binutils/binutils-2.25/gas/ |
| D | frags.c | 56 frag_alloc_check (const struct obstack *ob) in frag_alloc_check() argument
58 if (ob->chunk_size == 0) in frag_alloc_check()
76 frag_alloc (struct obstack *ob) in frag_alloc() argument
81 (void) obstack_alloc (ob, 0); in frag_alloc()
82 oalign = obstack_alignment_mask (ob); in frag_alloc()
83 obstack_alignment_mask (ob) = 0; in frag_alloc()
84 ptr = (fragS *) obstack_alloc (ob, SIZEOF_STRUCT_FRAG); in frag_alloc()
85 obstack_alignment_mask (ob) = oalign; in frag_alloc()
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| D | write.c | 1351 fragS **last_newf, struct obstack *ob) in compress_frag() argument
1365 avail_out = obstack_room (ob); in compress_frag()
1368 obstack_finish (ob); in compress_frag()
1369 f = frag_alloc (ob); in compress_frag()
1373 avail_out = obstack_room (ob); in compress_frag()
1377 next_out = obstack_next_free (ob); in compress_frag()
1378 obstack_blank_fast (ob, avail_out); in compress_frag()
1389 obstack_blank_fast (ob, -avail_out); in compress_frag()
1402 struct obstack *ob = &seginfo->frchainP->frch_obstack; in compress_debug() local
1426 first_newf = frag_alloc (ob); in compress_debug()
[all …]
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| /toolchain/binutils/binutils-2.25/binutils/ |
| D | srconv.c | 462 struct IT_ob ob; in wr_ob() local
465 ob.spare = 0; in wr_ob()
471 ob.saf = 1; in wr_ob()
473 ob.address = section->address; in wr_ob()
475 ob.address = 0; in wr_ob()
481 ob.saf = 0; in wr_ob()
484 ob.cpf = 0; /* Never compress. */ in wr_ob()
485 ob.data.len = todo; in wr_ob()
487 ob.data.data = stuff; in wr_ob()
488 sysroff_swap_ob_out (file, &ob /*, i + todo < section->size */ ); in wr_ob()
[all …]
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| D | sysroff.info | 15 (("ob") (1 byte) ("ob"))
163 ("ob" 0x1c
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| /toolchain/binutils/binutils-2.25/bfd/ |
| D | ieee.c | 2904 struct output_buffer_struct ob; in f8_record() local
2909 drop_int (&ob); in f8_record()
2915 fill_int (&ob); in f8_record()
2922 struct output_buffer_struct ob; in f8_record() local
2927 drop_int (&ob); in f8_record()
2938 fill_int (&ob); in f8_record()
2945 struct output_buffer_struct ob; in f8_record() local
2950 drop_int (&ob); in f8_record()
2961 fill_int (&ob); in f8_record()
2968 struct output_buffer_struct ob; in f8_record() local
[all …]
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| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | opc2c.c | 185 int ob; in valid_varybits() local
190 ob = (bits >> op->vary[vn].shift) & v->mask; in valid_varybits()
191 lprintf (sim_log, "varybits: vary %s ob %x\n", v->name, ob); in valid_varybits()
194 if (ob == v->patterns[i]) in valid_varybits()
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| /toolchain/binutils/binutils-2.25/gas/testsuite/ |
| D | ChangeLog-2004 | 590 "racm.ob".
|