| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| D | shifted.s | 23 .macro op3_64 op, shift argument
24 \op x1, x2, x3, \shift #0
25 \op x1, x2, x3, \shift #1
26 \op x1, x2, x3, \shift #3
27 \op x1, x2, x3, \shift #7
28 \op x1, x2, x3, \shift #15
29 \op x1, x2, x3, \shift #31
30 \op x1, x2, x3, \shift #63
33 .macro op3_32 op, shift argument
34 \op w1, w2, w3, \shift #0
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| D | bitfield-bfm.s | 40 .macro bf_32s op, shift argument
41 \op wzr, w7, \shift
45 .macro bf_64s op, shift argument
46 \op xzr, x7, \shift
59 .macro sr2bfm signed, reg, shift, imms
60 op_bfm signed=\signed, reg=\reg, immr=\shift, imms=\imms
64 .macro sl2bfm signed, reg, shift argument
108 .irp shift 0, 16, 31 // asr wzr, w7, #\shift
109 sr2bfm s, w, \shift, 31
112 .irp shift 0, 31, 63 // asr xzr, x7, #\shift
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| D | bitfield-alias.s | 42 .macro bf_32s op, shift argument
43 \op wzr, w7, \shift
47 .macro bf_64s op, shift argument
48 \op xzr, x7, \shift
84 .irp shift, 0, 16, 31
85 bf_32s \op, \shift
87 .irp shift, 0, 31, 63
88 bf_64s \op, \shift
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| D | addsub.s | 117 .macro do_addsub_shift type, op, R, reg, shift, amount
120 .ifb \shift
123 \op \reg\()16, \R, \reg\()1, \shift #\amount
128 .ifb \shift
131 \op \reg\()ZR, \R, \reg\()1, \shift #\amount
136 .ifb \shift
139 \op \R, \reg\()1, \shift #\amount
143 .ifb \shift
146 \op \R, \reg\()ZR, \reg\()1, \shift #\amount
160 .irp shift, LSL, LSR, ASR
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/score/ |
| D | ls32ls16p.s | 14 .macro tran3216 insn32, insn16, shift argument
17 \insn32 r3, [r2, 0x4 << \shift] #32b -> 16b
18 \insn16 r3, 0x4 << \shift
20 \insn32 r4, [r2, 0xC << \shift] #32b -> 16b
21 \insn16 r4, 0xC << \shift
23 \insn32 r7, [r2, 0x12 << \shift] #32b -> 16b
24 \insn32 r7, [r2, 0x12 << \shift] #32b -> 16b
26 \insn16 r8, 0x8 << \shift
27 \insn32 r8, [r2, 0x8 << \shift] #32b -> 16b
29 \insn32 r5, [r2, 0x20 << \shift] #No transform
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| D | shift-bad.l | 1 .*shift-bad.s: Assembler messages:
2 .*shift-bad.s:2: Error: extraneous shift as part of operand to shift insn -- `asr r0,r1,r2,ror#5'
4 .*shift-bad.s:7: Error: extraneous shift as part of operand to shift insn -- `ror r0,r0,r2,lsl#1'
6 .*shift-bad.s:9: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r0,r2,asr r0'
8 .*shift-bad.s:14: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r1,r2,lsl#1'
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| D | addthumb2err.l | 2 [^:]*:9: Error: shift value over 3 not allowed in thumb mode -- `add sp,sp,r0,LSL#4'
4 [^:]*:11: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ASR#3'
6 [^:]*:13: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,RRX'
8 [^:]*:15: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,LSR#3'
10 [^:]*:17: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ROR#3'
12 [^:]*:19: Error: shift value over 3 not allowed in thumb mode -- `sub sp,sp,r0,LSL#4'
14 [^:]*:21: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ASR#3'
16 [^:]*:23: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,RRX'
18 [^:]*:25: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,LSR#3'
20 [^:]*:27: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ROR#3'
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| D | tcompat.s | 2 .macro shift op opls ops oplss macro
16 shift lsl lslls lsls lsllss
17 shift lsr lsrls lsrs lsrlss
18 shift asr asrls asrs asrlss
19 shift ror rorls rors rorlss
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| /toolchain/binutils/binutils-2.25/include/ |
| D | leb128.h | 58 unsigned int shift = 0; in read_uleb128_to_uint64() local
68 result |= ((uint64_t) (byte & 0x7f)) << shift; in read_uleb128_to_uint64()
71 shift += 7; in read_uleb128_to_uint64()
91 unsigned int shift = 0; in read_sleb128_to_int64() local
101 result |= ((uint64_t) (byte & 0x7f)) << shift; in read_sleb128_to_int64()
102 shift += 7; in read_sleb128_to_int64()
106 if (shift < (sizeof (*r) * 8) && (byte & 0x40) != 0) in read_sleb128_to_int64()
107 result |= -(((uint64_t) 1) << shift); in read_sleb128_to_int64()
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| /toolchain/binutils/binutils-2.25/gold/ |
| D | int_encoding.cc | 44 unsigned int shift = 7; in read_unsigned_LEB_128_x() local
56 result |= (static_cast<uint64_t>(byte & 0x7f)) << shift; in read_unsigned_LEB_128_x()
57 shift += 7; in read_unsigned_LEB_128_x()
76 int shift = 7; in read_signed_LEB_128_x() local
89 result |= (static_cast<uint64_t>(byte & 0x7f) << shift); in read_signed_LEB_128_x()
90 shift += 7; in read_signed_LEB_128_x()
94 if ((shift < 8 * static_cast<int>(sizeof(result))) && (byte & 0x40)) in read_signed_LEB_128_x()
95 result |= -((static_cast<int64_t>(1)) << shift); in read_signed_LEB_128_x()
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/all/ |
| D | test-example.c | 27 #define namedregs(shift) \ argument
28 reg_r (named_regs, shift, 0x3, mk_get_bits (2u))
29 #define numberedregs(shift) \ argument
30 reg_p ("f", shift, mk_get_bits (2u))
35 #define jmp_cond(shift) { jmp_cond, { i1: shift } } in jmp_cond() argument
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| D | test-gen.c | 469 #define signed_constant(bits, shift, revert) \ in signed_constant() argument
470 { signed_constant, { i1: shift, i2: bits * (revert ? -1 : 1), \ in signed_constant()
504 #define unsigned_constant(bits, shift, revert) \ in unsigned_constant() argument
505 { unsigned_constant, { i1: shift, i2: bits * (revert ? -1 : 1), \ in unsigned_constant()
541 #define absolute_address (bits, shift, revert) \ in absolute_address()
542 { absolute_address, { i1: shift, i2: bits * (revert ? -1 : 1), \ in absolute_address()
581 #define reg_p(prefix,shift,gen) \ in reg_p() argument
582 { reg_p, { i1: (shift), p1: (prefix), gen } } in reg_p()
605 #define reg_r(names,shift,mask,gen) \ in reg_r() argument
606 { reg_r, { i1: (shift), i2: (mask), p1: (names), gen } } in reg_r()
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| /toolchain/binutils/binutils-2.25/opcodes/ |
| D | ip2k-ibld.c | 88 int shift; in insert_1() local
95 shift = (start + 1) - length; in insert_1()
97 shift = (word_length - (start + length)); in insert_1()
98 x = (x & ~(mask << shift)) | ((value & mask) << shift); in insert_1()
210 int shift; in insert_normal() local
213 shift = (word_offset + start + 1) - length; in insert_normal()
215 shift = total_length - (word_offset + start + length); in insert_normal()
216 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); in insert_normal()
307 int shift = insn_length - length; in put_insn_int_value() local
311 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); in put_insn_int_value()
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| D | or1k-ibld.c | 88 int shift; in insert_1() local
95 shift = (start + 1) - length; in insert_1()
97 shift = (word_length - (start + length)); in insert_1()
98 x = (x & ~(mask << shift)) | ((value & mask) << shift); in insert_1()
210 int shift; in insert_normal() local
213 shift = (word_offset + start + 1) - length; in insert_normal()
215 shift = total_length - (word_offset + start + length); in insert_normal()
216 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); in insert_normal()
307 int shift = insn_length - length; in put_insn_int_value() local
311 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); in put_insn_int_value()
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| D | lm32-ibld.c | 88 int shift; in insert_1() local
95 shift = (start + 1) - length; in insert_1()
97 shift = (word_length - (start + length)); in insert_1()
98 x = (x & ~(mask << shift)) | ((value & mask) << shift); in insert_1()
210 int shift; in insert_normal() local
213 shift = (word_offset + start + 1) - length; in insert_normal()
215 shift = total_length - (word_offset + start + length); in insert_normal()
216 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); in insert_normal()
307 int shift = insn_length - length; in put_insn_int_value() local
311 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); in put_insn_int_value()
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| D | arc-opc.c | 372 insn |= marker << operand->shift; in insert_reg()
381 insn |= ARC_REG_LIMM << operand->shift; in insert_reg()
407 insn |= ARC_REG_SHIMM << operand->shift; in insert_reg()
408 insn |= reg->value << arc_operands[reg->type].shift; in insert_reg()
430 insn |= reg->value << operand->shift; in insert_reg()
485 insn |= (value & ((1 << operand->bits) - 1)) << operand->shift; in insert_nullify()
507 insn |= (1 << operand->shift); in insert_flagfinish()
523 insn |= (value & ((1 << operand->bits) - 1)) << operand->shift; in insert_cond()
553 addrwb_p = 1 << operand->shift; in insert_addr_wb()
568 myinsn = insert_reg (0, operand,mods, reg, value, errmsg) >> operand->shift; in insert_base()
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| D | m32r-ibld.c | 88 int shift; in insert_1() local
95 shift = (start + 1) - length; in insert_1()
97 shift = (word_length - (start + length)); in insert_1()
98 x = (x & ~(mask << shift)) | ((value & mask) << shift); in insert_1()
210 int shift; in insert_normal() local
213 shift = (word_offset + start + 1) - length; in insert_normal()
215 shift = total_length - (word_offset + start + length); in insert_normal()
216 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); in insert_normal()
307 int shift = insn_length - length; in put_insn_int_value() local
311 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); in put_insn_int_value()
[all …]
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| D | xstormy16-ibld.c | 88 int shift; in insert_1() local
95 shift = (start + 1) - length; in insert_1()
97 shift = (word_length - (start + length)); in insert_1()
98 x = (x & ~(mask << shift)) | ((value & mask) << shift); in insert_1()
210 int shift; in insert_normal() local
213 shift = (word_offset + start + 1) - length; in insert_normal()
215 shift = total_length - (word_offset + start + length); in insert_normal()
216 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); in insert_normal()
307 int shift = insn_length - length; in put_insn_int_value() local
311 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); in put_insn_int_value()
[all …]
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| D | m10300-dis.c | 327 temp = extension >> operand->shift; in disassemble()
339 temp = extension >> operand->shift; in disassemble()
359 if (operand->shift >= 0) in disassemble()
362 shl_low = operand->shift; in disassemble()
368 shl_low = -operand->shift; in disassemble()
378 shl_low = -operand->shift; in disassemble()
392 value = ((extension >> (operand->shift)) in disassemble()
396 value = ((insn >> (operand->shift)) in disassemble()
414 value = ((insn >> (operand->shift + extra_shift)) in disassemble()
421 value = ((insn >> (operand->shift + extra_shift)) in disassemble()
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| /toolchain/binutils/binutils-2.25/bfd/ |
| D | cpu-ia64-opc.c | 68 *code |= value << self->field[0].shift; in ins_reg()
75 *valuep = ((code >> self->field[0].shift) in ext_reg()
89 << self->field[i].shift); in ins_immu()
108 value |= ((code >> self->field[i].shift) in ext_immu()
173 << self->field[i].shift); in ins_imms_scaled()
194 val |= ((code >> self->field[i].shift) in ext_imms_scaled()
318 *code |= value << self->field[0].shift; in ins_cnt()
325 *valuep = ((code >> self->field[0].shift) in ext_cnt()
338 *code |= value << self->field[0].shift; in ins_cnt2b()
345 *valuep = ((code >> self->field[0].shift) & 0x3) + 1; in ext_cnt2b()
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| D | elfxx-ia64.c | 517 int shift, r1, r3; in ia64_elf_relax_ldxmov() local
522 case 0: shift = 5; break; in ia64_elf_relax_ldxmov()
523 case 1: shift = 14; off += 3; break; in ia64_elf_relax_ldxmov()
524 case 2: shift = 23; off += 6; break; in ia64_elf_relax_ldxmov()
530 insn = (dword >> shift) & 0x1ffffffffffLL; in ia64_elf_relax_ldxmov()
539 dword &= ~(0x1ffffffffffLL << shift); in ia64_elf_relax_ldxmov()
540 dword |= (insn << shift); in ia64_elf_relax_ldxmov()
548 int bigendian = 0, shift = 0; in ia64_elf_install_value() local
730 case 0: shift = 5; break; in ia64_elf_install_value()
731 case 1: shift = 14; hit_addr += 3; break; in ia64_elf_install_value()
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| /toolchain/binutils/binutils-2.25/gas/config/ |
| D | tc-cr16.c | 1765 print_constant (int nbits, int shift, argument *arg) in print_constant() argument
1808 if ((instruction->size > 2) && (shift == WORD_SHIFT)) in print_constant()
1822 CR16_PRINT (0, constant, shift); in print_constant()
1830 CR16_PRINT (0, ((constant) & 0xf), shift); /* 0-3 bits. */ in print_constant()
1831 CR16_PRINT (0, ((constant >> 4) & 0x3), (shift + 20)); /* 4-5 bits. */ in print_constant()
1832 CR16_PRINT (0, ((constant >> 6) & 0x3), (shift + 14)); /* 6-7 bits. */ in print_constant()
1833 CR16_PRINT (0, ((constant >> 8) & 0x3f), (shift + 8)); /* 8-13 bits. */ in print_constant()
1836 CR16_PRINT (0, constant, shift); in print_constant()
1852 if ((instruction->size > 2) && (shift == WORD_SHIFT)) in print_constant()
1855 CR16_PRINT (0, constant, shift); in print_constant()
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mn10300/ |
| D | am33-2.c | 38 #define d8(shift) signed_constant( 8, shift, 1) argument
39 #define d16(shift) signed_constant(16, shift, 1) argument
40 #define d24(shift) signed_constant(24, shift, 1) argument
41 #define d32(shift) signed_constant(32, shift, 1) argument
42 #define u8(shift) unsigned_constant( 8, shift, 1) argument
43 #define u24(shift) unsigned_constant(24, shift, 1) argument
44 #define a16(shift) absolute_address(16, shift, 1) argument
47 #define amreg(shift) reg_r (am33_regs, shift, 15, mk_get_bits (5u)) argument
106 #define d8pcoff(shift) { d8pcoff, { p1: shift } } in d8pcoff() argument
151 #define d8pcsec(shift) { d8pcsec, { p1: shift } } in d8pcsec() argument
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| /toolchain/binutils/binutils-2.25/etc/ |
| D | texi2pod.pl | 34 $shift = "";
160 $shift = "";
222 if ($shift ne "") {
227 if ($shift eq "") {
306 $shift = "\t";
331 $section .= $shift.$_."\n";
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| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/elf/ |
| D | symtab.s | 4 .set shift, 32 define
5 .set shift, shift - 1 define
|