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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
Dmicromips-branch-delay.l2 .*:17: Warning: wrong size instruction in a 16-bit branch delay slot
3 .*:19: Warning: wrong size instruction in a 16-bit branch delay slot
4 …21: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
5 .*:40: Warning: wrong size instruction in a 16-bit branch delay slot
6 .*:44: Warning: wrong size instruction in a 16-bit branch delay slot
7 .*:46: Warning: wrong size instruction in a 16-bit branch delay slot
8 .*:71: Warning: wrong size instruction in a 16-bit branch delay slot
9 .*:90: Warning: macro instruction expanded into multiple instructions in a branch delay slot
10 …92: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
11 …94: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
[all …]
Dmicromips-size-1.l2 .*:50: Warning: wrong size instruction in a 32-bit branch delay slot
3 .*:58: Warning: wrong size instruction in a 16-bit branch delay slot
4 .*:64: Warning: wrong size instruction in a 16-bit branch delay slot
5 .*:66: Warning: wrong size instruction in a 16-bit branch delay slot
6 .*:68: Warning: wrong size instruction in a 32-bit branch delay slot
7 .*:70: Warning: wrong size instruction in a 32-bit branch delay slot
8 .*:82: Warning: wrong size instruction in a 32-bit branch delay slot
9 .*:90: Warning: wrong size instruction in a 32-bit branch delay slot
10 .*:92: Warning: wrong size instruction in a 32-bit branch delay slot
Dmicromips-warn-branch-delay.l2 .*:8: Warning: wrong size instruction in a 16-bit branch delay slot
3 .*:10: Warning: wrong size instruction in a 16-bit branch delay slot
4 .*:12: Warning: wrong size instruction in a 16-bit branch delay slot
5 .*:14: Warning: wrong size instruction in a 16-bit branch delay slot
6 .*:16: Warning: wrong size instruction in a 16-bit branch delay slot
7 .*:18: Warning: wrong size instruction in a 16-bit branch delay slot
8 .*:20: Warning: wrong size instruction in a 16-bit branch delay slot
Dmicromips-size-0.l10 .*:58: Warning: wrong size instruction in a 32-bit branch delay slot
11 .*:66: Warning: wrong size instruction in a 16-bit branch delay slot
15 .*:77: Warning: wrong size instruction in a 16-bit branch delay slot
16 .*:78: Warning: wrong size instruction in a 16-bit branch delay slot
17 .*:80: Warning: wrong size instruction in a 32-bit branch delay slot
18 .*:82: Warning: wrong size instruction in a 32-bit branch delay slot
21 …95: Warning: macro instruction expanded into a wrong size instruction in a 16-bit branch delay slot
22 .*:95: Warning: macro instruction expanded into multiple instructions in a branch delay slot
23 .*:98: Warning: wrong size instruction in a 32-bit branch delay slot
Dmips-gp64-fp64.l2 .*:92: Warning: macro instruction expanded into multiple instructions in a branch delay slot
3 .*:96: Warning: macro instruction expanded into multiple instructions in a branch delay slot
4 .*:100: Warning: macro instruction expanded into multiple instructions in a branch delay slot
Dmacro-warn-1.l6 .*:16: Warning: macro instruction expanded into multiple instructions.*slot
7 .*:18: Warning: macro instruction expanded into multiple instructions.*slot
8 .*:20: Warning: macro instruction expanded into multiple instructions.*slot
Dmips-abi32-pic2.s21 # slot for the jalr below!
55 # slot for the jalr below!
91 # slot for the jalr below!
106 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
Dn32-consec.s4 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
11 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
Dmacro-warn-1-n32.l5 .*:16: Warning: macro instruction expanded into multiple instructions.*slot
6 .*:20: Warning: macro instruction expanded into multiple instructions.*slot
Dbranch-misc-4.s13 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
26 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
/toolchain/binutils/binutils-2.25/libiberty/
Dhashtab.c486 PTR *slot = htab->entries + index; in find_empty_slot_for_expand() local
489 if (*slot == HTAB_EMPTY_ENTRY) in find_empty_slot_for_expand()
490 return slot; in find_empty_slot_for_expand()
491 else if (*slot == HTAB_DELETED_ENTRY) in find_empty_slot_for_expand()
501 slot = htab->entries + index; in find_empty_slot_for_expand()
502 if (*slot == HTAB_EMPTY_ENTRY) in find_empty_slot_for_expand()
503 return slot; in find_empty_slot_for_expand()
504 else if (*slot == HTAB_DELETED_ENTRY) in find_empty_slot_for_expand()
726 PTR *slot; in htab_remove_elt_with_hash() local
728 slot = htab_find_slot_with_hash (htab, element, hash, NO_INSERT); in htab_remove_elt_with_hash()
[all …]
/toolchain/binutils/binutils-2.25/gas/config/
Dtc-xtensa.c2105 int slot, opnd, fmt_found; in get_invisible_operands() local
2113 slot = 0; in get_invisible_operands()
2116 for (slot = 0; slot < xtensa_format_num_slots (isa, fmt); slot++) in get_invisible_operands()
2118 if (xtensa_opcode_encode (isa, fmt, slot, slotbuf, opc) == 0) in get_invisible_operands()
2143 xtensa_operand_set_field (isa, opc, opnd, fmt, slot, slotbuf, val); in get_invisible_operands()
2152 xtensa_operand_get_field (isa, opc, opnd, fmt, slot, slotbuf, &val); in get_invisible_operands()
2554 get_opcode_from_buf (const char *buf, int slot) in get_opcode_from_buf() argument
2572 if (slot >= xtensa_format_num_slots (isa, fmt)) in get_opcode_from_buf()
2575 xtensa_format_get_slot (isa, fmt, slot, insnbuf, slotbuf); in get_opcode_from_buf()
2576 return xtensa_opcode_decode (isa, fmt, slot, slotbuf); in get_opcode_from_buf()
[all …]
Dtc-ia64.c66 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
67 #define CURR_SLOT md.slot[md.curr_slot]
279 struct slot struct
309 slot[NUM_SLOTS]; member
6428 build_insn (struct slot *slot, bfd_vma *insnp) in build_insn() argument
6431 struct ia64_opcode *idesc = slot->idesc; in build_insn()
6437 insn = idesc->opcode | slot->qp_regno; in build_insn()
6441 if (slot->opnd[i].X_op == O_register in build_insn()
6442 || slot->opnd[i].X_op == O_constant in build_insn()
6443 || slot->opnd[i].X_op == O_index) in build_insn()
[all …]
/toolchain/binutils/binutils-2.25/opcodes/
Dia64-dis.c71 ia64_insn t0, t1, slot[3], template_val, s_bit, insn; in print_insn_ia64() local
104 slot[0] = (t0 >> 5) & 0x1ffffffffffLL; in print_insn_ia64()
105 slot[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); in print_insn_ia64()
106 slot[2] = (t1 >> 23) & 0x1ffffffffffLL; in print_insn_ia64()
123 insn = slot[slotnum]; in print_insn_ia64()
159 | (slot[1] << 22) | (((insn >> 36) & 0x1) << 63); in print_insn_ia64()
164 value = ((slot[1] & 0x1ffffffffffLL) << 21) in print_insn_ia64()
173 | (((slot[1] >> 2) & 0x7fffffffffLL) << 20)) << 4; in print_insn_ia64()
/toolchain/binutils/binutils-2.25/binutils/
Drdcoff.c211 debug_type *slot; in parse_coff_type() local
215 slot = coff_get_slot (types, pauxent->x_sym.x_tagndx.l); in parse_coff_type()
216 if (*slot != DEBUG_TYPE_NULL) in parse_coff_type()
217 return *slot; in parse_coff_type()
219 return debug_make_indirect_type (dhandle, slot, (const char *) NULL); in parse_coff_type()
245 debug_type *slot; in parse_coff_base_type() local
331 slot = coff_get_slot (types, coff_symno); in parse_coff_base_type()
332 *slot = ret; in parse_coff_base_type()
344 slot = coff_get_slot (types, coff_symno); in parse_coff_base_type()
345 *slot = ret; in parse_coff_base_type()
[all …]
/toolchain/binutils/binutils-2.25/gold/
Ddwp.cc537 enter_set(unsigned int slot, const Unit_set* set);
541 hash_table(unsigned int slot) const in hash_table()
542 { return this->hash_table_[slot]; } in hash_table()
547 index_table(unsigned int slot) const in index_table()
548 { return this->index_table_[slot]; } in index_table()
1329 unsigned int slot = static_cast<unsigned int>(dwo_id) & (nslots - 1); in sized_verify_dwo_list() local
1330 const unsigned char* ph = phash + slot * sizeof(uint64_t); in sized_verify_dwo_list()
1331 const unsigned char* pi = pindex + slot * sizeof(uint32_t); in sized_verify_dwo_list()
1340 slot = (slot + h2) & (nslots - 1); in sized_verify_dwo_list()
1341 ph = phash + slot * sizeof(uint64_t); in sized_verify_dwo_list()
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/microblaze/
Dreloc_weaksym.s16 nop # Unfilled delay slot
33 nop # Unfilled delay slot
36 nop # Unfilled delay slot
44 nop # Unfilled delay slot
/toolchain/binutils/binutils-2.25/include/
Dxtensa-isa.h331 xtensa_format_slot_nop_opcode (xtensa_isa isa, xtensa_format fmt, int slot);
339 xtensa_format_get_slot (xtensa_isa isa, xtensa_format fmt, int slot,
343 xtensa_format_set_slot (xtensa_isa isa, xtensa_format fmt, int slot,
362 xtensa_opcode_decode (xtensa_isa isa, xtensa_format fmt, int slot,
371 xtensa_opcode_encode (xtensa_isa isa, xtensa_format fmt, int slot,
488 xtensa_format fmt, int slot,
493 xtensa_format fmt, int slot,
/toolchain/binutils/binutils-2.25/bfd/
Dxtensa-isa.c599 xtensa_format_slot_nop_opcode (xtensa_isa isa, xtensa_format fmt, int slot) in xtensa_format_slot_nop_opcode() argument
605 CHECK_SLOT (intisa, fmt, slot, XTENSA_UNDEFINED); in xtensa_format_slot_nop_opcode()
607 slot_id = intisa->formats[fmt].slot_id[slot]; in xtensa_format_slot_nop_opcode()
613 xtensa_format_get_slot (xtensa_isa isa, xtensa_format fmt, int slot, in xtensa_format_get_slot() argument
620 CHECK_SLOT (intisa, fmt, slot, -1); in xtensa_format_get_slot()
622 slot_id = intisa->formats[fmt].slot_id[slot]; in xtensa_format_get_slot()
629 xtensa_format_set_slot (xtensa_isa isa, xtensa_format fmt, int slot, in xtensa_format_set_slot() argument
636 CHECK_SLOT (intisa, fmt, slot, -1); in xtensa_format_set_slot()
638 slot_id = intisa->formats[fmt].slot_id[slot]; in xtensa_format_set_slot()
692 xtensa_opcode_decode (xtensa_isa isa, xtensa_format fmt, int slot, in xtensa_opcode_decode() argument
[all …]
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/iq2000/
Dyield1.s2 # (e.g. SLEEP) appearing in the branch delay slot. We expect
7 # sleep insn in the branch delay slot.
Dnoyield.s2 # (e.g. SLEEP) does NOT appear in the branch delay slot.
6 # nop in the branch delay slot.
Dyield2.s2 # (e.g. SLEEP) appearing in the branch delay slot. We expect
8 # sleep insn in the branch delay slot.
Dyield0.s2 # (e.g. SLEEP) appearing in the branch delay slot. We expect
6 # yield insn in the branch delay slot.
/toolchain/binutils/binutils-2.25/binutils/testsuite/binutils-all/mips/
Dmixed-micromips.s14 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
31 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
Dmixed-mips16.s14 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
32 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...

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