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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/
Dneon-vfp-reglist-post.d11 c: 0cdf2000 ld1 {v0.8b-v3.8b}, \[x0\], #32
15 1c: 0cdf2400 ld1 {v0.4h-v3.4h}, \[x0\], #32
19 2c: 0cdf2800 ld1 {v0.2s-v3.2s}, \[x0\], #32
23 3c: 0cdf2c00 ld1 {v0.1d-v3.1d}, \[x0\], #32
27 4c: 0c9f2000 st1 {v0.8b-v3.8b}, \[x0\], #32
31 5c: 0c9f2400 st1 {v0.4h-v3.4h}, \[x0\], #32
35 6c: 0c9f2800 st1 {v0.2s-v3.2s}, \[x0\], #32
39 7c: 0c9f2c00 st1 {v0.1d-v3.1d}, \[x0\], #32
43 8c: 4cdf2000 ld1 {v0.16b-v3.16b}, \[x0\], #64
47 9c: 4cdf2400 ld1 {v0.8h-v3.8h}, \[x0\], #64
[all …]
Dneon-vfp-reglist.d11 c: 0c402000 ld1 {v0.8b-v3.8b}, \[x0\]
14 18: 0c400000 ld4 {v0.8b-v3.8b}, \[x0\]
18 28: 0c002000 st1 {v0.8b-v3.8b}, \[x0\]
21 34: 0c000000 st4 {v0.8b-v3.8b}, \[x0\]
25 44: 4c402000 ld1 {v0.16b-v3.16b}, \[x0\]
28 50: 4c400000 ld4 {v0.16b-v3.16b}, \[x0\]
32 60: 4c002000 st1 {v0.16b-v3.16b}, \[x0\]
35 6c: 4c000000 st4 {v0.16b-v3.16b}, \[x0\]
39 7c: 0c402400 ld1 {v0.4h-v3.4h}, \[x0\]
42 88: 0c400400 ld4 {v0.4h-v3.4h}, \[x0\]
[all …]
Dverbose-error.l12 …ers in the list; only 1 register is expected at operand 1 -- `ld1r \{v1.4s,v2.4s,v3.4s\},\[x3\],x4'
56 [^:]*:20: Error: operand mismatch -- `ursqrte v2.8b,v3.8b'
154 [^:]*:52: Error: operand mismatch -- `sha1su0 v1.16b,v2.16b,v3.16b'
159 [^:]*:54: Info: shadd v1.8b,v2.8b,v3.8b
161 [^:]*:54: Info: shadd v1.16b,v2.16b,v3.16b
162 [^:]*:54: Info: shadd v1.4h,v2.4h,v3.4h
163 [^:]*:54: Info: shadd v1.8h,v2.8h,v3.8h
164 [^:]*:54: Info: shadd v1.2s,v2.2s,v3.2s
165 [^:]*:54: Info: shadd v1.4s,v2.4s,v3.4s
166 [^:]*:56: Error: operand mismatch -- `sqdmulh v1.16b,v2.16b,v3.16b'
[all …]
Dverbose-error.s10 ld1r {v1.4s, v2.4s, v3.4s}, [x3], x4
20 ursqrte v2.8b, v3.8b
52 sha1su0 v1.16b, v2.16b, v3.16b
54 shadd v1.2d, v2.2d, v3.2d
56 sqdmulh v1.16b, v2.16b, v3.16b
58 sqdmlal2 v1.16b, v2.16b, v3.16b
Dneon-vfp-reglist-post.s13 \inst\()1 {v0.\type, v1.\type, v2.\type, v3.\type}, [x0], #32
26 \inst\()1 {v0.\type, v1.\type, v2.\type, v3.\type}, [x0], #64
39 \inst\()1 {v0.\type, v1.\type, v2.\type, v3.\type}, [x0], \postreg
76 \inst\()4 {v0.\type, v1.\type, v2.\type, v3.\type}, [x0], #32
78 \inst\()4 {v0.\type, v1.\type, v2.\type, v3.\type}, [x0], \postreg
83 \inst\()4 {v0.\type, v1.\type, v2.\type, v3.\type}, [x0], #64
85 \inst\()4 {v0.\type, v1.\type, v2.\type, v3.\type}, [x0], \postreg
109 \inst\()4\rep {v0.\type, v1.\type, v2.\type, v3.\type}\index, [x0], #4
127 \inst\()4\rep {v0.\type, v1.\type, v2.\type, v3.\type}\index, [x0], #8
143 \inst\()4\rep {v0.\type, v1.\type, v2.\type, v3.\type}\index, [x0], #16
[all …]
Dillegal.s103 st1 {v2.s, v3.s}[1], [x4]
104 ld2 {v1.s, v2.s, v3.s}[1], [x3]
105 st2 {v2.s, v2.s, v3.s}[1], [x4]
106 ld3 {v1.s, v2.s, v3.s, v4.s}[1], [x3]
107 st3 {v2.s, v3.s, v4.s, v5.s}[1], [x4]
111 ld2 {v1.b, v3.b}[1], [x3]
113 ld3 {v1.b, v3.b, v5.b}[1], [x3]
115 ld4 {v1.b, v3.b, v5.b, v7.b}[1], [x3]
120 ld1r {v1.4s, v3.4s}, [x3]
121 ld1r {v1.4s, v2.4s, v3.4s}, [x3]
[all …]
Dneon-ins.d12 10: 4e011c63 mov v3.b\[0\], w3
13 14: 4e011c63 mov v3.b\[0\], w3
72 100: 4e031c63 mov v3.b\[1\], w3
73 104: 4e031c63 mov v3.b\[1\], w3
132 1f0: 4e051c63 mov v3.b\[2\], w3
133 1f4: 4e051c63 mov v3.b\[2\], w3
192 2e0: 4e071c63 mov v3.b\[3\], w3
193 2e4: 4e071c63 mov v3.b\[3\], w3
252 3d0: 4e091c63 mov v3.b\[4\], w3
253 3d4: 4e091c63 mov v3.b\[4\], w3
[all …]
Dneon-not.d16 20: 2e205863 mvn v3.8b, v3.8b
17 24: 2e205863 mvn v3.8b, v3.8b
18 28: 6e205863 mvn v3.16b, v3.16b
19 2c: 6e205863 mvn v3.16b, v3.16b
Dmovi.s118 movi v3.8b, -128
119 movi v3.8b, -127
120 movi v3.8b, -1
Dfp-const0-parse.s40 fcmle v3.2s, v27.2s, #0
59 fcmle v3.2s, v27.2s, #0.0
Dfp-const0-parse.d21 34: 2ea0db63 fcmle v3.2s, v27.2s, #0.0
36 70: 2ea0db63 fcmle v3.2s, v27.2s, #0.0
Dillegal.l66 [^:]*:103: Error: .*`st1 {v2.s,v3.s}\[1\],\[x4\]'
68 [^:]*:105: Error: .*`st2 {v2.s,v2.s,v3.s}\[1\],\[x4\]'
70 [^:]*:107: Error: .*`st3 {v2.s,v3.s,v4.s,v5.s}\[1\],\[x4\]'
80 [^:]*:120: Error: .*`ld1r {v1.4s,v3.4s},\[x3\]'
82 [^:]*:122: Error: .*`ld2r {v1.4s,v2.4s,v3.4s},\[x3\]'
86 [^:]*:127: Error: .*`ld1r {v1.4s,v2.4s,v3.4s},\[x3\],x4'
88 [^:]*:129: Error: .*`ld3r {v1.4s,v2.4s,v3.4s,v4.4s},\[x3\],x4'
94 [^:]*:136: Error: .*`ld4r {v1.4s,v2.4s,v3.4s,v4.4s},\[x3\],#32'
168 [^:]*:237: Error: .*`tbl v0.16b,{v1.16b,v3.16b,v5.16b},v2.16b'
/toolchain/binutils/binutils-2.25/gold/testsuite/
Dlarge.c29 int v3[0x10000]; variable
40 assert (v3[0] == 0 && v3[0xffff] == 0); in main()
47 assert (&v1 < v3 && &v1 < v4 && &v1 < v5); in main()
48 assert (&v2 < v3 && &v2 < v4 && &v2 < v5); in main()
49 assert (&v6 < v3 && &v6 < v4 && &v6 < v5); in main()
50 assert (&v7 < v3 && &v7 < v4 && &v7 < v5); in main()
54 assert (v3 < v4); in main()
55 assert (v3 < v5); in main()
Dtls_test.cc71 __thread int v3 = 3; variable
103 CHECK_EQ_OR_RETURN(v3, 3); in t3()
104 v3 = 30; in t3()
212 CHECK_EQ_OR_RETURN(v3, 30); in t_last()
Dweak_undef_file2.cc46 int *v3 = &v2; variable
69 return (v3 == NULL) ? -1 : *v3; in t3()
Dweak_undef_file1.cc51 int *v3 = &v2; variable
74 return (v3 == NULL) ? -1 : *v3; in t3()
Dtwo_file_test_1_v1.cc81 return v3 == 0; // Intentionally wrong. in t3()
112 int* p7 = &v3;
Dtwo_file_test_1.cc76 return v3 == 789; in t3()
107 int* p7 = &v3;
Ddwp_test_1.cc48 return v3 == 789; in testcase3()
79 int* p7 = &v3;
/toolchain/binutils/binutils-2.25/libiberty/testsuite/
Ddemangle-expected11 # --is-v3-ctor Calls is_gnu_v3_mangled_ctor on input; expected
13 # --is-v3-dtor Likewise, but for dtors.
3223 --format=gnu-v3 --no-params
3228 --format=gnu-v3 --no-params
3266 --format=gnu-v3 --no-params
3271 --format=gnu-v3 --no-params
3276 --format=gnu-v3 --no-params
3281 --format=gnu-v3 --no-params
3286 --format=gnu-v3 --no-params
3291 --format=gnu-v3 --no-params
[all …]
/toolchain/binutils/binutils-2.25/config/
Dlibstdc++-raw-cxx.m418 # for libstdc++-v3 header files to compile and link libraries in C++ with
23 -I\$(top_builddir)/../libstdc++-v3/include \
24 -I\$(top_builddir)/../libstdc++-v3/include/\$(target_noncanonical) \
25 -I\$(top_srcdir)/../libstdc++-v3/libsupc++"
27 \$(top_builddir)/../libstdc++-v3/src/libstdc++.la"
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/ppc/
Daltivec.d45 8c: (10 7e 58 0a|0a 58 7e 10) vaddfp v3,v30,v11
56 b8: (10 6d dc 04|04 dc 6d 10) vand v3,v13,v27
62 d0: (10 77 ec 82|82 ec 77 10) vavguw v3,v23,v29
68 e8: (12 7a 1f c6|c6 1f 7a 12) vcmpbfp\. v19,v26,v3
83 124: (13 83 eb 46|46 eb 83 13) vcmpgtsh v28,v3,v29
103 174: (12 63 b1 82|82 b1 63 12) vmaxsw v19,v3,v22
108 188: (13 e0 1c a1|a1 1c e0 13) vmhraddshs v31,v0,v3,v18
112 198: (10 64 0b 82|82 0b 64 10) vminsw v3,v4,v1
115 1a4: (10 c3 0a 82|82 0a c3 10) vminuw v6,v3,v1
116 1a8: (10 7d 1e a2|a2 1e 7d 10) vmladduhm v3,v29,v3,v26
[all …]
Daltivec2.d10 0: (7c 60 e2 0e|0e e2 60 7c) lvepxl v3,0,r28
20 28: (7c 60 66 0a|0a 66 60 7c) lvsm v3,0,r12
38 70: (7c 60 56 4e|4e 56 60 7c) stvepx v3,0,r10
66 e0: (11 c9 18 88|88 18 c9 11) vmulouw v14,v9,v3
100 168: (10 73 35 4c|4c 35 73 10) vbpermq v3,v19,v6
106 180: (10 73 84 c7|c7 84 73 10) vcmpequd\. v3,v19,v16
119 1b4: (13 80 1f 82|82 1f 80 13) vclzw v28,v3
/toolchain/binutils/binutils-2.25/
DMakefile.def116 target_modules = { module= libstdc++-v3;
530 dependencies = { module=all-target-libstdc++-v3; on=configure-target-libgomp; };
535 dependencies = { module=install-target-libsanitizer; on=install-target-libstdc++-v3; };
537 dependencies = { module=install-target-libvtv; on=install-target-libstdc++-v3; };
539 dependencies = { module=install-target-libcilkrts; on=install-target-libstdc++-v3; };
544 dependencies = { module=install-target-libstdc++-v3; on=install-target-libgcc; };
559 lib-check-target=check-target-libstdc++-v3;
DMakefile.in235 @if target-libstdc++-v3-bootstrap
249 @endif target-libstdc++-v3-bootstrap
428 @if target-libstdc++-v3-bootstrap
431 @endif target-libstdc++-v3-bootstrap
438 @if target-libstdc++-v3-bootstrap
441 @endif target-libstdc++-v3-bootstrap
448 @if target-libstdc++-v3-bootstrap
451 @endif target-libstdc++-v3-bootstrap
458 @if target-libstdc++-v3-bootstrap
461 @endif target-libstdc++-v3-bootstrap
[all …]

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