Searched refs:variant (Results 1 – 25 of 119) sorted by relevance
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6 [^:]*:5: Info: other valid variant\(s\):27 [^:]*:13: Info: other valid variant\(s\):38 [^:]*:15: Info: other valid variant\(s\):49 [^:]*:18: Info: other valid variant\(s\):64 [^:]*:22: Info: other valid variant\(s\):77 [^:]*:26: Info: other valid variant\(s\):91 [^:]*:30: Info: other valid variant\(s\):106 [^:]*:34: Info: other valid variant\(s\):123 [^:]*:42: Info: other valid variant\(s\):133 [^:]*:46: Info: other valid variant\(s\):[all …]
1 # name: Cannot use flag-variant of PSR on v7m and v6m.
5 # VxWorks needs a special variant of this file.
5 # This is the VxWorks variant of this file.
3 # This is the VxWorks variant of this file.
4 # EABI targets have their own variant.
5 # EABI targets have their own variant.
4 #name: .cranges descriptors with final variant.
10 # variant of sec-5.d with the lop_loc having a misalignment, followed
5 ; A variant of exbwtest.s. This is an example of invalid use of the broken-
50 environments without such a symbol prefix. The variant used for51 GNU/Linux port has no symbol prefix. Which variant to produce75 @cindex Architecture variant option, CRIS76 @cindex CRIS architecture variant option85 All instructions and register names for any architecture variant311 A variant of @samp{GOTPLT} giving a 16-bit value. Its
151 Recognize and emit additional instructions for the H8/300H variant, and156 Recognize and emit additional instructions for the H8S variant, and161 Recognize and emit additional instructions for the H8/300H variant in166 Recognize and emit additional instructions for the H8S variant in
829 This variant is used to indicate that floating-point is not used within834 This variant indicates that double-precision support is used. For 64-bit840 This variant indicates that single-precision support is used. Double844 This variant indicates that although floating-point support is used all849 This variant existed as an initial attempt at supporting 64-bit wide854 This variant is used by 32-bit ABIs to indicate that the floating-point857 support is used. Only O32 currently supports this variant and requires861 This variant is used by 32-bit ABIs to indicate that the floating-point864 variant and requires a minimum architecture of MIPS32r2.867 This variant is used by 32-bit ABIs to indicate that the floating-point[all …]
37 This option selects the core processor variant. Using68 variant from within assembly code.152 the register in the auxiliary register memory map for the variant of
32 Mark the generated binary as targeting the G10 variant of the RL78
32 instructions each variant supports, please see the chip's architecture
16 # FIXME: Maybe need TARGET variant, though c++filt should be target
50 dnl Transform the name of the compiler to it's cross variant, unless147 dnl Transform the name of the compiler to it's cross variant, unless435 dnl Transform the name of the compiler to it's cross variant, unless
158 # b. a variant of presentlang (because in this case,
193 #define def_am_insn(insname, variant, size, word, funcs...) \ argument194 define_insn(insname ## _ ## variant, \199 #define am_insn(insname, variant) insn (insname ## _ ## variant) argument
206 int variant; member
1510 opc->variant = opt; in build_opcode_syntax()2105 int variant = 0; in parse_insn() local2168 if ((1 << (opt++)) & variant) in parse_insn()2193 variant++; in parse_insn()2195 while (variant < (1 << opc->variant)); in parse_insn()
1382 Loosen CFI-matching regexps so they match x86_64-*-nacl* variant too.1385 Loosen CFI-matching regexp so it matches x86_64-*-nacl* variant too.1698 * ld-arm/tls-gdesc-got.d: Match variant file formats too.1701 * ld-arm/thumb2-b-interwork.d: Match variant file formats too.1708 * ld-arm/arm-app.r: Match variant file formats too.1816 * ld-i386/hidden2.d: Loosen regexps to match any file format variant,1864 * ld-x86-64/ilp32-8.d: Match any file format variant.1865 Use a -Ttext and adjust expected results, to handle variant layouts.2053 * ld-selective/selective.exp: Test m68hc1* variant of m6811, m6812.