Searched defs:out_reg (Results 1 – 14 of 14) sorted by relevance
217 ManagedRegister out_reg = main_jni_conv->CurrentParamRegister(); in ArtJniCompileMethodInternal() local264 ManagedRegister out_reg = main_jni_conv->CurrentParamRegister(); in ArtJniCompileMethodInternal() local336 ManagedRegister out_reg = main_jni_conv->CurrentParamRegister(); in ArtJniCompileMethodInternal() local430 ManagedRegister out_reg = end_jni_conv->CurrentParamRegister(); in ArtJniCompileMethodInternal() local442 ManagedRegister out_reg = end_jni_conv->CurrentParamRegister(); in ArtJniCompileMethodInternal() local533 ManagedRegister out_reg = jni_conv->CurrentParamRegister(); in CopyParameter() local557 ManagedRegister out_reg = jni_conv->CurrentParamRegister(); in CopyParameter() local
737 ArmManagedRegister out_reg = mout_reg.AsArm(); in CreateHandleScopeEntry() local786 ArmManagedRegister out_reg = mout_reg.AsArm(); in LoadReferenceFromHandleScope() local
552 Arm64ManagedRegister out_reg = m_out_reg.AsArm64(); in CreateHandleScopeEntry() local597 Arm64ManagedRegister out_reg = m_out_reg.AsArm64(); in LoadReferenceFromHandleScope() local
417 FPRegister out_reg = is64bit ? DRegisterFrom(out) : SRegisterFrom(out); in MathAbsFP() local453 Register out_reg = is64bit ? XRegisterFrom(output) : WRegisterFrom(output); in GenAbsInteger() local485 FPRegister out_reg = is_double ? DRegisterFrom(out) : SRegisterFrom(out); in GenMinMaxFP() local545 Register out_reg = is_long ? XRegisterFrom(out) : WRegisterFrom(out); in GenMinMax() local636 Register out_reg = is_double ? in GenMathRound() local
3313 Register out_reg = out.AsRegister<Register>(); in HandleShift() local4083 DRegister out_reg = FromLowSToD(out.AsFpuRegisterPairLow<SRegister>()); in HandleFieldGet() local5792 Register out_reg = out.AsRegister<Register>(); in VisitBitwiseNegatedRight() local5900 Register out_reg = out.AsRegister<Register>(); in HandleBitwiseOperation() local5934 Register out_reg = out.AsRegister<Register>(); in HandleBitwiseOperation() local5969 Register out_reg = out.AsRegister<Register>(); in GenerateReferenceLoadOneRegister() local6000 Register out_reg = out.AsRegister<Register>(); in GenerateReferenceLoadTwoRegisters() local
4830 Register out_reg = RegisterFrom(out, type); in GenerateReferenceLoadOneRegister() local4867 Register out_reg = RegisterFrom(out, type); in GenerateReferenceLoadTwoRegisters() local
304 Register out_reg = output.AsRegister<Register>(); in GenAbsInteger() local
6183 CpuRegister out_reg = out.AsRegister<CpuRegister>(); in GenerateReferenceLoadOneRegister() local6214 CpuRegister out_reg = out.AsRegister<CpuRegister>(); in GenerateReferenceLoadTwoRegisters() local
6720 Register out_reg = out.AsRegister<Register>(); in GenerateReferenceLoadOneRegister() local6751 Register out_reg = out.AsRegister<Register>(); in GenerateReferenceLoadTwoRegisters() local
2332 Mips64ManagedRegister out_reg = mout_reg.AsMips64(); in CreateHandleScopeEntry() local2382 Mips64ManagedRegister out_reg = mout_reg.AsMips64(); in LoadReferenceFromHandleScope() local
2289 X86ManagedRegister out_reg = mout_reg.AsX86(); in CreateHandleScopeEntry() local2330 X86ManagedRegister out_reg = mout_reg.AsX86(); in LoadReferenceFromHandleScope() local
3041 X86_64ManagedRegister out_reg = mout_reg.AsX86_64(); in CreateHandleScopeEntry() local3088 X86_64ManagedRegister out_reg = mout_reg.AsX86_64(); in LoadReferenceFromHandleScope() local
2781 MipsManagedRegister out_reg = mout_reg.AsMips(); in CreateHandleScopeEntry() local2830 MipsManagedRegister out_reg = mout_reg.AsMips(); in LoadReferenceFromHandleScope() local
1061 for (size_t out_reg = 0; out_reg < num_outs; out_reg++) { in DumpVregLocations() local