| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.h | 187 bool isSALU(uint16_t Opcode) const { in isSALU()
195 bool isVALU(uint16_t Opcode) const { in isVALU()
203 bool isVMEM(uint16_t Opcode) const { in isVMEM()
211 bool isSOP1(uint16_t Opcode) const { in isSOP1()
219 bool isSOP2(uint16_t Opcode) const { in isSOP2()
227 bool isSOPC(uint16_t Opcode) const { in isSOPC()
235 bool isSOPK(uint16_t Opcode) const { in isSOPK()
243 bool isSOPP(uint16_t Opcode) const { in isSOPP()
251 bool isVOP1(uint16_t Opcode) const { in isVOP1()
259 bool isVOP2(uint16_t Opcode) const { in isVOP2()
[all …]
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| D | AMDGPUTargetTransformInfo.cpp | 111 unsigned Opcode, Type *Ty, TTI::OperandValueKind Opd1Info, in getArithmeticInstrCost()
204 unsigned AMDGPUTTIImpl::getCFInstrCost(unsigned Opcode) { in getCFInstrCost()
215 int AMDGPUTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy, in getVectorInstrCost()
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| D | AMDGPUInstrInfo.cpp | 62 int AMDGPUInstrInfo::getMaskedMIMGOp(uint16_t Opcode, unsigned Channels) const { in getMaskedMIMGOp()
82 static int getMCOpcode(uint16_t Opcode, unsigned Gen) { in getMCOpcode()
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| /external/llvm/lib/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.cpp | 59 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, Type *Ty) { in buildInstr()
72 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, unsigned Res, in buildInstr()
77 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, Type *Ty, in buildInstr()
88 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, unsigned Res, in buildInstr()
95 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode) { in buildInstr()
99 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, Type *Ty, in buildInstr()
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.h | 141 static inline bool isSPLSOpcode(unsigned Opcode) { in isSPLSOpcode()
155 static inline bool isRMOpcode(unsigned Opcode) { in isRMOpcode()
165 static inline bool isRRMOpcode(unsigned Opcode) { in isRRMOpcode()
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| D | LanaiRegisterInfo.cpp | 73 static bool isALUArithLoOpcode(unsigned Opcode) { in isALUArithLoOpcode()
89 static unsigned getOppositeALULoOpcode(unsigned Opcode) { in getOppositeALULoOpcode()
112 static unsigned getRRMOpcodeVariant(unsigned Opcode) { in getRRMOpcodeVariant()
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| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCPredicates.cpp | 19 PPC::Predicate PPC::InvertPredicate(PPC::Predicate Opcode) { in InvertPredicate()
53 PPC::Predicate PPC::getSwappedPredicate(PPC::Predicate Opcode) { in getSwappedPredicate()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMUnwindOpAsm.h | 74 void EmitInt8(unsigned Opcode) { in EmitInt8()
79 void EmitInt16(unsigned Opcode) { in EmitInt16()
85 void EmitBytes(const uint8_t *Opcode, size_t Size) { in EmitBytes()
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| /external/libchrome/sandbox/win/src/sidestep/ |
| D | mini_disassembler_types.h | 140 struct Opcode { struct
162 SpecificOpcode opcode_if_f2_prefix_; argument
163 SpecificOpcode opcode_if_f3_prefix_; argument
164 SpecificOpcode opcode_if_66_prefix_; argument
170 const Opcode* table_; argument
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| /external/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 53 int ARMTTIImpl::getIntImmCodeSizeCost(unsigned Opcode, unsigned Idx, in getIntImmCodeSizeCost()
61 int ARMTTIImpl::getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, in getIntImmCost()
76 int ARMTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) { in getCastInstrCost()
269 int ARMTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy, in getVectorInstrCost()
294 int ARMTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy) { in getCmpSelInstrCost()
412 unsigned Opcode, Type *Ty, TTI::OperandValueKind Op1Info, in getArithmeticInstrCost()
483 int ARMTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, in getMemoryOpCost()
496 int ARMTTIImpl::getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, in getInterleavedMemoryOpCost()
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| D | ARMSelectionDAGInfo.h | 24 static inline ShiftOpc getShiftOpcForNode(unsigned Opcode) { in getShiftOpcForNode()
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| /external/llvm/tools/llvm-readobj/ |
| D | ARMEHABIPrinter.h | 97 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_00xxxxxx() local
102 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_01xxxxxx() local
120 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10011101() local
124 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10011111() local
128 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_1001nnnn() local
132 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10100nnn() local
138 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10101nnn() local
144 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10110000() local
161 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10110010_uleb128() local
187 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_101101nn() local
[all …]
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZShortenInst.cpp | 109 bool SystemZShortenInst::shortenOn0(MachineInstr &MI, unsigned Opcode) { in shortenOn0()
119 bool SystemZShortenInst::shortenOn01(MachineInstr &MI, unsigned Opcode) { in shortenOn01()
131 bool SystemZShortenInst::shortenOn001(MachineInstr &MI, unsigned Opcode) { in shortenOn001()
144 bool SystemZShortenInst::shortenOn001AddCC(MachineInstr &MI, unsigned Opcode) { in shortenOn001AddCC()
157 bool SystemZShortenInst::shortenFPConv(MachineInstr &MI, unsigned Opcode) { in shortenFPConv()
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| D | SystemZAsmPrinter.cpp | 31 static MCInst lowerRILow(const MachineInstr *MI, unsigned Opcode) { in lowerRILow()
45 static MCInst lowerRIHigh(const MachineInstr *MI, unsigned Opcode) { in lowerRIHigh()
59 static MCInst lowerRIEfLow(const MachineInstr *MI, unsigned Opcode) { in lowerRIEfLow()
85 static MCInst lowerSubvectorLoad(const MachineInstr *MI, unsigned Opcode) { in lowerSubvectorLoad()
95 static MCInst lowerSubvectorStore(const MachineInstr *MI, unsigned Opcode) { in lowerSubvectorStore()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCTargetTransformInfo.cpp | 108 int PPCTTIImpl::getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, in getIntImmCost()
281 unsigned Opcode, Type *Ty, TTI::OperandValueKind Op1Info, in getArithmeticInstrCost()
304 int PPCTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) { in getCastInstrCost()
310 int PPCTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy) { in getCmpSelInstrCost()
314 int PPCTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) { in getVectorInstrCost()
353 int PPCTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, in getMemoryOpCost()
410 int PPCTTIImpl::getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, in getInterleavedMemoryOpCost()
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| /external/llvm/include/llvm/MC/ |
| D | MCInstrInfo.h | 45 const MCInstrDesc &get(unsigned Opcode) const { in get()
51 const char *getName(unsigned Opcode) const { in getName()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64TargetTransformInfo.cpp | 64 int AArch64TTIImpl::getIntImmCost(unsigned Opcode, unsigned Idx, in getIntImmCost()
179 int AArch64TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) { in getCastInstrCost()
294 int AArch64TTIImpl::getExtractWithExtendCost(unsigned Opcode, Type *Dst, in getExtractWithExtendCost()
349 int AArch64TTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, in getVectorInstrCost()
375 unsigned Opcode, Type *Ty, TTI::OperandValueKind Opd1Info, in getArithmeticInstrCost()
435 int AArch64TTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, in getCmpSelInstrCost()
466 int AArch64TTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src, in getMemoryOpCost()
495 int AArch64TTIImpl::getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, in getInterleavedMemoryOpCost()
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| /external/llvm/include/llvm/Analysis/ |
| D | TargetTransformInfoImpl.h | 47 unsigned getOperationCost(unsigned Opcode, Type *Ty, Type *OpTy) { in getOperationCost()
260 int getIntImmCodeSizeCost(unsigned Opcode, unsigned Idx, const APInt &Imm, in getIntImmCodeSizeCost()
267 unsigned getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, in getIntImmCost()
293 unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, in getArithmeticInstrCost()
306 unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) { return 1; } in getCastInstrCost()
308 unsigned getExtractWithExtendCost(unsigned Opcode, Type *Dst, in getExtractWithExtendCost()
313 unsigned getCFInstrCost(unsigned Opcode) { return 1; } in getCFInstrCost()
315 unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy) { in getCmpSelInstrCost()
319 unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) { in getVectorInstrCost()
323 unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, in getMemoryOpCost()
[all …]
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| /external/llvm/lib/Analysis/ |
| D | TargetTransformInfo.cpp | 50 int TargetTransformInfo::getOperationCost(unsigned Opcode, Type *Ty, in getOperationCost()
212 int TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode, unsigned Idx, in getIntImmCodeSizeCost()
226 int TargetTransformInfo::getIntImmCost(unsigned Opcode, unsigned Idx, in getIntImmCost()
273 unsigned Opcode, Type *Ty, OperandValueKind Opd1Info, in getArithmeticInstrCost()
289 int TargetTransformInfo::getCastInstrCost(unsigned Opcode, Type *Dst, in getCastInstrCost()
296 int TargetTransformInfo::getExtractWithExtendCost(unsigned Opcode, Type *Dst, in getExtractWithExtendCost()
310 int TargetTransformInfo::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, in getCmpSelInstrCost()
317 int TargetTransformInfo::getVectorInstrCost(unsigned Opcode, Type *Val, in getVectorInstrCost()
324 int TargetTransformInfo::getMemoryOpCost(unsigned Opcode, Type *Src, in getMemoryOpCost()
332 int TargetTransformInfo::getMaskedMemoryOpCost(unsigned Opcode, Type *Src, in getMaskedMemoryOpCost()
[all …]
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyTargetTransformInfo.cpp | 47 unsigned Opcode, Type *Ty, TTI::OperandValueKind Opd1Info, in getArithmeticInstrCost()
74 unsigned WebAssemblyTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, in getVectorInstrCost()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCPredicates.cpp | 19 PPC::Predicate PPC::InvertPredicate(PPC::Predicate Opcode) { in InvertPredicate()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCHazardRecognizers.cpp | 66 PPCHazardRecognizer970::GetInstrType(unsigned Opcode, in GetInstrType()
134 unsigned Opcode = Node->getMachineOpcode(); in getHazardType() local
233 unsigned Opcode = Node->getMachineOpcode(); in EmitInstruction() local
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMHazardRecognizer.cpp | 26 unsigned Opcode = MCID.getOpcode(); in hasRAWHazard() local
85 unsigned Opcode = MI->getOpcode(); in EmitInstruction() local
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| D | ARMSelectionDAGInfo.h | 23 static inline ShiftOpc getShiftOpcForNode(unsigned Opcode) { in getShiftOpcForNode()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreFrameLowering.cpp | 106 int Opcode = isImmU6(OpImm) ? XCore::EXTSP_u6 : XCore::EXTSP_lu6; in IfNeededExtSP() local
128 int Opcode = isImmU6(OpImm) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6; in IfNeededLDAWSP() local
200 int Opcode = isImmU6(Offset) ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6; in RestoreSpillList() local
261 int Opcode = isImmU6(Adjusted) ? XCore::ENTSP_u6 : XCore::ENTSP_lu6; in emitPrologue() local
286 int Opcode = isImmU6(Offset) ? XCore::STWSP_ru6 : XCore::STWSP_lru6; in emitPrologue() local
399 int Opcode = isImmU6(RemainingAdj) ? XCore::RETSP_u6 : XCore::RETSP_lu6; in emitEpilogue() local
406 int Opcode = isImmU6(RemainingAdj) ? XCore::LDAWSP_ru6 : in emitEpilogue() local
516 int Opcode = isU6 ? XCore::EXTSP_u6 : XCore::EXTSP_lu6; in eliminateCallFramePseudoInstr() local
521 int Opcode = isU6 ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6; in eliminateCallFramePseudoInstr() local
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