| /external/llvm/lib/MC/ |
| D | MCRegisterInfo.cpp | 32 for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI) in getSubReg() local
43 for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI) in getSubRegIndex() local
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| /external/vixl/examples/aarch32/ |
| D | pi.cc | 70 __ Subs(r0, r0, 1); in GenerateApproximatePi() local
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| /external/eigen/Eigen/src/Core/ |
| D | BandMatrix.h | 30 Subs = internal::traits<Derived>::Subs, enumerator
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| /external/llvm/lib/Support/ |
| D | CommandLine.cpp | 1710 SmallVectorImpl<std::pair<const char *, SubCommand *>> &Subs) { in sortSubCommands()
1734 void printSubCommands(StrSubCommandPairVector &Subs, size_t MaxSubLen) { in printSubCommands()
1762 StrSubCommandPairVector Subs; in operator =() local
2119 auto &Subs = GlobalParser->RegisteredSubCommands; in getRegisteredOptions() local
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| /external/llvm/include/llvm/Support/ |
| D | CommandLine.h | 254 SmallPtrSet<SubCommand *, 4> Subs; // The subcommands this option belongs to. variable
|
| /external/v8/src/compiler/arm64/ |
| D | code-generator-arm64.cc | 1106 __ Subs(i.OutputRegister(), i.InputOrZeroRegister64(0), in AssembleArchInstruction() local
1115 __ Subs(i.OutputRegister32(), i.InputOrZeroRegister32(0), in AssembleArchInstruction() local
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| /external/v8/src/full-codegen/arm64/ |
| D | full-codegen-arm64.cc | 177 __ Subs(x2, x2, 1); in Generate() local
370 __ Subs(x3, x3, Smi::FromInt(delta)); in EmitProfilingCounterDecrement() local
1803 __ Subs(x10, left, right); in EmitInlineSmiBinaryOp() local
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| /external/v8/src/crankshaft/arm64/ |
| D | lithium-codegen-arm64.cc | 879 __ Subs(x1, x1, 1); in DeoptimizeBranch() local
1568 __ Subs(length, length, 1); in DoApplyArguments() local
5172 __ Subs(result, left, right); in DoSubI() local
5186 __ Subs(result, left, right); in DoSubS() local
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| /external/v8/src/regexp/arm64/ |
| D | regexp-macro-assembler-arm64.cc | 765 __ Subs(x10, csp, x10); in GetCode() local
|
| /external/v8/src/arm64/ |
| D | macro-assembler-arm64-inl.h | 189 void MacroAssembler::Subs(const Register& rd, in Subs() function
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| D | code-stubs-arm64.cc | 2722 __ Subs(length_delta, scratch1, scratch2); in GenerateCompareFlatOneByteStrings() local
2739 __ Subs(result, length_delta, 0); in GenerateCompareFlatOneByteStrings() local
4040 __ Subs(x0, x0, x3); in Generate() local
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| D | macro-assembler-arm64.cc | 1044 __ Subs(temp, temp, 1); in PushMultipleTimes() local
|
| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.cc | 1395 void MacroAssembler::Subs(const Register& rd, in Subs() function in vixl::aarch64::MacroAssembler
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| /external/v8/src/builtins/arm64/ |
| D | builtins-arm64.cc | 146 __ Subs(x4, x4, 1); in Generate_MathMaxMin() local
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| /external/vixl/test/aarch32/ |
| D | test-assembler-aarch32.cc | 3212 __ Subs(r0, r0, 0); in TEST() local
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| /external/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.h | 4710 void Subs(Condition cond, Register rd, Register rn, const Operand& operand) { in Subs() function
4720 void Subs(Register rd, Register rn, const Operand& operand) { in Subs() function
|