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Building X86GenInstrInfo.inc... $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-instr-info -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenInstrInfo.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-instr-info -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenInstrInfo.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-instr-info -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenInstrInfo.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-instr-info -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenInstrInfo.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) X86GenInstrInfo.inc X86GenInstrInfo.inc X86GenInstrInfo.inc X86GenInstrInfo.inc Building X86GenAsmWriter.inc... Building X86GenAsmWriter.inc... $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-writer -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmWriter.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-writer -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmWriter.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) X86GenAsmWriter.inc X86GenAsmWriter.inc Building X86GenAsmWriter.inc... Building X86GenAsmWriter.inc... Building X86GenAsmWriter.inc... Building X86GenAsmWriter.inc... $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-writer -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmWriter.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-writer -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmWriter.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-writer -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmWriter.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-writer -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmWriter.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) X86GenAsmWriter.inc X86GenAsmWriter.inc X86GenAsmWriter.inc X86GenAsmWriter.inc Building X86GenAsmWriter1.inc... Building X86GenAsmWriter1.inc... $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-writer -asmwriternum=1 -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmWriter1.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-writer -asmwriternum=1 -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmWriter1.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) X86GenAsmWriter1.inc X86GenAsmWriter1.inc Building X86GenAsmWriter1.inc... Building X86GenAsmWriter1.inc... Building X86GenAsmWriter1.inc... Building X86GenAsmWriter1.inc... $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-writer -asmwriternum=1 -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmWriter1.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-writer -asmwriternum=1 -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmWriter1.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-writer -asmwriternum=1 -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmWriter1.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-writer -asmwriternum=1 -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmWriter1.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) X86GenAsmWriter1.inc X86GenAsmWriter1.inc X86GenAsmWriter1.inc X86GenAsmWriter1.inc Building X86GenAsmMatcher.inc... Building X86GenAsmMatcher.inc... $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-matcher -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmMatcher.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-matcher -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmMatcher.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) X86GenAsmMatcher.inc X86GenAsmMatcher.inc Building X86GenAsmMatcher.inc... Building X86GenAsmMatcher.inc... Building X86GenAsmMatcher.inc... Building X86GenAsmMatcher.inc... $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-matcher -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmMatcher.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-matcher -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmMatcher.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-matcher -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmMatcher.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-asm-matcher -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenAsmMatcher.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) X86GenAsmMatcher.inc X86GenAsmMatcher.inc X86GenAsmMatcher.inc X86GenAsmMatcher.inc Building X86GenDAGISel.inc... Building X86GenDAGISel.inc... $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-dag-isel -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenDAGISel.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-dag-isel -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenDAGISel.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) X86GenDAGISel.inc X86GenDAGISel.inc Building X86GenDAGISel.inc... Building X86GenDAGISel.inc... Building X86GenDAGISel.inc... Building X86GenDAGISel.inc... $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-dag-isel -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenDAGISel.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-dag-isel -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenDAGISel.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-dag-isel -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenDAGISel.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-dag-isel -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenDAGISel.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) X86GenDAGISel.inc X86GenDAGISel.inc X86GenDAGISel.inc X86GenDAGISel.inc Building X86GenFastISel.inc... Building X86GenFastISel.inc... $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-fast-isel -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenFastISel.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-fast-isel -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenFastISel.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) X86GenFastISel.inc X86GenFastISel.inc Building X86GenFastISel.inc... Building X86GenFastISel.inc... Building X86GenFastISel.inc... Building X86GenFastISel.inc... $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-fast-isel -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenFastISel.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-fast-isel -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenFastISel.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-fast-isel -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenFastISel.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-fast-isel -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenFastISel.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) X86GenFastISel.inc X86GenFastISel.inc X86GenFastISel.inc X86GenFastISel.inc Building X86GenCallingConv.inc... Building X86GenCallingConv.inc... $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-callingconv -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenCallingConv.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-callingconv -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenCallingConv.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;%(AdditionalInputs) X86GenCallingConv.inc X86GenCallingConv.inc Building X86GenCallingConv.inc... Building X86GenCallingConv.inc... Building X86GenCallingConv.inc... Building X86GenCallingConv.inc... $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-callingconv -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenCallingConv.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-callingconv -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenCallingConv.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-callingconv -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenCallingConv.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-callingconv -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenCallingConv.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;%(AdditionalInputs) X86GenCallingConv.inc X86GenCallingConv.inc X86GenCallingConv.inc X86GenCallingConv.inc Building X86GenSubtargetInfo.inc... Building X86GenSubtargetInfo.inc... $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-subtarget -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenSubtargetInfo.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-subtarget -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenSubtargetInfo.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) X86GenSubtargetInfo.inc X86GenSubtargetInfo.inc Building X86GenSubtargetInfo.inc... Building X86GenSubtargetInfo.inc... Building X86GenSubtargetInfo.inc... Building X86GenSubtargetInfo.inc... $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-subtarget -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenSubtargetInfo.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-subtarget -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenSubtargetInfo.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-subtarget -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenSubtargetInfo.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-subtarget -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenSubtargetInfo.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) X86GenSubtargetInfo.inc X86GenSubtargetInfo.inc X86GenSubtargetInfo.inc X86GenSubtargetInfo.inc Building X86GenEDInfo.inc... Building X86GenEDInfo.inc... $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-enhanced-disassembly-info -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenEDInfo.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-enhanced-disassembly-info -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenEDInfo.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe;X86.td;X86CallingConv.td;X86Instr3DNow.td;X86InstrArithmetic.td;X86InstrCMovSetCC.td;X86InstrCompiler.td;X86InstrControl.td;X86InstrExtension.td;X86InstrFMA.td;X86InstrFormats.td;X86InstrFPStack.td;X86InstrFragmentsSIMD.td;X86InstrInfo.td;X86InstrMMX.td;X86InstrShiftRotate.td;X86InstrSSE.td;X86InstrSystem.td;X86InstrVMX.td;X86RegisterInfo.td;..\..\..\include\llvm\CodeGen\ValueTypes.td;..\..\..\include\llvm\Intrinsics.td;..\..\..\include\llvm\IntrinsicsAlpha.td;..\..\..\include\llvm\IntrinsicsARM.td;..\..\..\include\llvm\IntrinsicsCellSPU.td;..\..\..\include\llvm\IntrinsicsPowerPC.td;..\..\..\include\llvm\IntrinsicsPTX.td;..\..\..\include\llvm\IntrinsicsX86.td;..\..\..\include\llvm\IntrinsicsXCore.td;..\..\..\include\llvm\Target\Target.td;..\..\..\include\llvm\Target\TargetCallingConv.td;..\..\..\include\llvm\Target\TargetSchedule.td;..\..\..\include\llvm\Target\TargetSelectionDAG.td;X86.td;%(AdditionalInputs) X86GenEDInfo.inc X86GenEDInfo.inc Building X86GenEDInfo.inc... Building X86GenEDInfo.inc... Building X86GenEDInfo.inc... Building X86GenEDInfo.inc... $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-enhanced-disassembly-info -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenEDInfo.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-enhanced-disassembly-info -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenEDInfo.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-enhanced-disassembly-info -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenEDInfo.inc $(SolutionDir)bin\llvm-tblgen\$(Platform)\$(Configuration)\llvm-tblgen.exe -gen-enhanced-disassembly-info -I ..\X86 -I ..\..\Target -I ..\..\..\include X86.td -o X86GenEDInfo.inc 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X86GenEDInfo.inc X86GenEDInfo.inc X86GenEDInfo.inc X86GenEDInfo.inc E9B87B46-1EB0-4D95-9049-41B148FBADCD 1F8587CB-0779-44BB-AFA4-03DD8A036D75 Document Document Document Document Document Document Document Document Document Document Document Document Document Document Document Document Document Document Document