100                             int shamt, int funct) {  in EmitR()  argument
108                       shamt << kShamtShift |  in EmitR()
114                               int shamt, int funct) {  in EmitRsd()  argument
121                       shamt << kShamtShift |  in EmitRsd()
127                               int shamt, int funct) {  in EmitRtd()  argument
134                       shamt << kShamtShift |  in EmitRtd()
476 void Mips64Assembler::Sll(GpuRegister rd, GpuRegister rt, int shamt) {  in Sll()  argument
477   EmitR(0, static_cast<GpuRegister>(0), rt, rd, shamt, 0x00);  in Sll()
480 void Mips64Assembler::Srl(GpuRegister rd, GpuRegister rt, int shamt) {  in Srl()  argument
481   EmitR(0, static_cast<GpuRegister>(0), rt, rd, shamt, 0x02);  in Srl()
484 void Mips64Assembler::Rotr(GpuRegister rd, GpuRegister rt, int shamt) {  in Rotr()  argument
485   EmitR(0, static_cast<GpuRegister>(1), rt, rd, shamt, 0x02);  in Rotr()
488 void Mips64Assembler::Sra(GpuRegister rd, GpuRegister rt, int shamt) {  in Sra()  argument
489   EmitR(0, static_cast<GpuRegister>(0), rt, rd, shamt, 0x03);  in Sra()
508 void Mips64Assembler::Dsll(GpuRegister rd, GpuRegister rt, int shamt) {  in Dsll()  argument
509   EmitR(0, static_cast<GpuRegister>(0), rt, rd, shamt, 0x38);  in Dsll()
512 void Mips64Assembler::Dsrl(GpuRegister rd, GpuRegister rt, int shamt) {  in Dsrl()  argument
513   EmitR(0, static_cast<GpuRegister>(0), rt, rd, shamt, 0x3a);  in Dsrl()
516 void Mips64Assembler::Drotr(GpuRegister rd, GpuRegister rt, int shamt) {  in Drotr()  argument
517   EmitR(0, static_cast<GpuRegister>(1), rt, rd, shamt, 0x3a);  in Drotr()
520 void Mips64Assembler::Dsra(GpuRegister rd, GpuRegister rt, int shamt) {  in Dsra()  argument
521   EmitR(0, static_cast<GpuRegister>(0), rt, rd, shamt, 0x3b);  in Dsra()
524 void Mips64Assembler::Dsll32(GpuRegister rd, GpuRegister rt, int shamt) {  in Dsll32()  argument
525   EmitR(0, static_cast<GpuRegister>(0), rt, rd, shamt, 0x3c);  in Dsll32()
528 void Mips64Assembler::Dsrl32(GpuRegister rd, GpuRegister rt, int shamt) {  in Dsrl32()  argument
529   EmitR(0, static_cast<GpuRegister>(0), rt, rd, shamt, 0x3e);  in Dsrl32()
532 void Mips64Assembler::Drotr32(GpuRegister rd, GpuRegister rt, int shamt) {  in Drotr32()  argument
533   EmitR(0, static_cast<GpuRegister>(1), rt, rd, shamt, 0x3e);  in Drotr32()
536 void Mips64Assembler::Dsra32(GpuRegister rd, GpuRegister rt, int shamt) {  in Dsra32()  argument
537   EmitR(0, static_cast<GpuRegister>(0), rt, rd, shamt, 0x3f);  in Dsra32()