Lines Matching refs:FreeRegs
868 CCState(unsigned CC) : CC(CC), FreeRegs(0), FreeSSERegs(0) {} in CCState()
871 unsigned FreeRegs; member
1219 if (State.FreeRegs) { in getIndirectReturnResult()
1220 --State.FreeRegs; in getIndirectReturnResult()
1364 if (State.FreeRegs) { in getIndirectResult()
1365 --State.FreeRegs; // Non-byval indirects just use one pointer. in getIndirectResult()
1412 if (SizeInRegs > State.FreeRegs) { in updateFreeRegs()
1413 State.FreeRegs = 0; in updateFreeRegs()
1421 if (SizeInRegs > State.FreeRegs || SizeInRegs > 2) in updateFreeRegs()
1425 State.FreeRegs -= SizeInRegs; in updateFreeRegs()
1449 if (getContext().getTypeSize(Ty) <= 32 && State.FreeRegs) in shouldAggregateUseDirect()
1542 (!IsMCUABI || State.FreeRegs == 0) && canExpandIndirectArgument(Ty)) in classifyArgumentType()
1588 State.FreeRegs = 3; in computeInfo()
1590 State.FreeRegs = 2; in computeInfo()
1592 State.FreeRegs = 2; in computeInfo()
1595 State.FreeRegs = FI.getRegParm(); in computeInfo()
1597 State.FreeRegs = DefaultNumRegisterParameters; in computeInfo()
1604 if (State.FreeRegs) { in computeInfo()
1605 --State.FreeRegs; // The sret parameter consumes a register. in computeInfo()
1613 ++State.FreeRegs; in computeInfo()
6761 State.FreeRegs = FI.getRegParm(); in computeInfo()
6763 State.FreeRegs = 4; in computeInfo()
6784 if (SizeInRegs > State.FreeRegs) { in shouldUseInReg()
6785 State.FreeRegs = 0; in shouldUseInReg()
6789 State.FreeRegs -= SizeInRegs; in shouldUseInReg()
6797 if (State.FreeRegs) { in getIndirectResult()
6798 --State.FreeRegs; // Non-byval indirects just use one pointer. in getIndirectResult()
6836 if (SizeInRegs <= State.FreeRegs) { in classifyArgumentType()
6840 State.FreeRegs -= SizeInRegs; in classifyArgumentType()
6843 State.FreeRegs = 0; in classifyArgumentType()