Lines Matching refs:__v8di
41 return (__m512i) __builtin_ia32_pmullq512_mask ((__v8di) __A, in _mm512_mask_mullo_epi64()
42 (__v8di) __B, in _mm512_mask_mullo_epi64()
43 (__v8di) __W, in _mm512_mask_mullo_epi64()
49 return (__m512i) __builtin_ia32_pmullq512_mask ((__v8di) __A, in _mm512_maskz_mullo_epi64()
50 (__v8di) __B, in _mm512_maskz_mullo_epi64()
51 (__v8di) in _mm512_maskz_mullo_epi64()
243 (__v8di) _mm512_setzero_si512(), in _mm512_cvtpd_epi64()
251 (__v8di) __W, in _mm512_mask_cvtpd_epi64()
259 (__v8di) _mm512_setzero_si512(), in _mm512_maskz_cvtpd_epi64()
266 (__v8di)_mm512_setzero_si512(), \
271 (__v8di)(__m512i)(W), \
276 (__v8di)_mm512_setzero_si512(), \
282 (__v8di) _mm512_setzero_si512(), in _mm512_cvtpd_epu64()
290 (__v8di) __W, in _mm512_mask_cvtpd_epu64()
298 (__v8di) _mm512_setzero_si512(), in _mm512_maskz_cvtpd_epu64()
305 (__v8di)_mm512_setzero_si512(), \
310 (__v8di)(__m512i)(W), \
315 (__v8di)_mm512_setzero_si512(), \
321 (__v8di) _mm512_setzero_si512(), in _mm512_cvtps_epi64()
329 (__v8di) __W, in _mm512_mask_cvtps_epi64()
337 (__v8di) _mm512_setzero_si512(), in _mm512_maskz_cvtps_epi64()
344 (__v8di)_mm512_setzero_si512(), \
349 (__v8di)(__m512i)(W), \
354 (__v8di)_mm512_setzero_si512(), \
360 (__v8di) _mm512_setzero_si512(), in _mm512_cvtps_epu64()
368 (__v8di) __W, in _mm512_mask_cvtps_epu64()
376 (__v8di) _mm512_setzero_si512(), in _mm512_maskz_cvtps_epu64()
383 (__v8di)_mm512_setzero_si512(), \
388 (__v8di)(__m512i)(W), \
393 (__v8di)_mm512_setzero_si512(), \
399 return (__m512d) __builtin_ia32_cvtqq2pd512_mask ((__v8di) __A, in _mm512_cvtepi64_pd()
407 return (__m512d) __builtin_ia32_cvtqq2pd512_mask ((__v8di) __A, in _mm512_mask_cvtepi64_pd()
415 return (__m512d) __builtin_ia32_cvtqq2pd512_mask ((__v8di) __A, in _mm512_maskz_cvtepi64_pd()
422 (__m512d)__builtin_ia32_cvtqq2pd512_mask((__v8di)(__m512i)(A), \
427 (__m512d)__builtin_ia32_cvtqq2pd512_mask((__v8di)(__m512i)(A), \
432 (__m512d)__builtin_ia32_cvtqq2pd512_mask((__v8di)(__m512i)(A), \
438 return (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A, in _mm512_cvtepi64_ps()
446 return (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A, in _mm512_mask_cvtepi64_ps()
454 return (__m256) __builtin_ia32_cvtqq2ps512_mask ((__v8di) __A, in _mm512_maskz_cvtepi64_ps()
461 (__m256)__builtin_ia32_cvtqq2ps512_mask((__v8di)(__m512i)(A), \
466 (__m256)__builtin_ia32_cvtqq2ps512_mask((__v8di)(__m512i)(A), \
471 (__m256)__builtin_ia32_cvtqq2ps512_mask((__v8di)(__m512i)(A), \
479 (__v8di) _mm512_setzero_si512(), in _mm512_cvttpd_epi64()
487 (__v8di) __W, in _mm512_mask_cvttpd_epi64()
495 (__v8di) _mm512_setzero_si512(), in _mm512_maskz_cvttpd_epi64()
502 (__v8di)_mm512_setzero_si512(), \
507 (__v8di)(__m512i)(W), \
512 (__v8di)_mm512_setzero_si512(), \
518 (__v8di) _mm512_setzero_si512(), in _mm512_cvttpd_epu64()
526 (__v8di) __W, in _mm512_mask_cvttpd_epu64()
534 (__v8di) _mm512_setzero_si512(), in _mm512_maskz_cvttpd_epu64()
541 (__v8di)_mm512_setzero_si512(), \
546 (__v8di)(__m512i)(W), \
551 (__v8di)_mm512_setzero_si512(), \
557 (__v8di) _mm512_setzero_si512(), in _mm512_cvttps_epi64()
565 (__v8di) __W, in _mm512_mask_cvttps_epi64()
573 (__v8di) _mm512_setzero_si512(), in _mm512_maskz_cvttps_epi64()
580 (__v8di)_mm512_setzero_si512(), \
585 (__v8di)(__m512i)(W), \
590 (__v8di)_mm512_setzero_si512(), \
596 (__v8di) _mm512_setzero_si512(), in _mm512_cvttps_epu64()
604 (__v8di) __W, in _mm512_mask_cvttps_epu64()
612 (__v8di) _mm512_setzero_si512(), in _mm512_maskz_cvttps_epu64()
619 (__v8di)_mm512_setzero_si512(), \
624 (__v8di)(__m512i)(W), \
629 (__v8di)_mm512_setzero_si512(), \
634 return (__m512d) __builtin_ia32_cvtuqq2pd512_mask ((__v8di) __A, in _mm512_cvtepu64_pd()
642 return (__m512d) __builtin_ia32_cvtuqq2pd512_mask ((__v8di) __A, in _mm512_mask_cvtepu64_pd()
650 return (__m512d) __builtin_ia32_cvtuqq2pd512_mask ((__v8di) __A, in _mm512_maskz_cvtepu64_pd()
657 (__m512d)__builtin_ia32_cvtuqq2pd512_mask((__v8di)(__m512i)(A), \
662 (__m512d)__builtin_ia32_cvtuqq2pd512_mask((__v8di)(__m512i)(A), \
668 (__m512d)__builtin_ia32_cvtuqq2pd512_mask((__v8di)(__m512i)(A), \
675 return (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A, in _mm512_cvtepu64_ps()
683 return (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A, in _mm512_mask_cvtepu64_ps()
691 return (__m256) __builtin_ia32_cvtuqq2ps512_mask ((__v8di) __A, in _mm512_maskz_cvtepu64_ps()
698 (__m256)__builtin_ia32_cvtuqq2ps512_mask((__v8di)(__m512i)(A), \
703 (__m256)__builtin_ia32_cvtuqq2ps512_mask((__v8di)(__m512i)(A), \
708 (__m256)__builtin_ia32_cvtuqq2ps512_mask((__v8di)(__m512i)(A), \
1004 return (__mmask8) __builtin_ia32_cvtq2mask512 ((__v8di) __A); in _mm512_movepi64_mask()
1133 (__v8di)_mm512_setzero_si512(), in _mm512_broadcast_i64x2()
1141 (__v8di) in _mm512_mask_broadcast_i64x2()
1149 (__v8di)_mm512_setzero_si512 (), in _mm512_maskz_broadcast_i64x2()
1202 (__m128i)__builtin_ia32_extracti64x2_512_mask((__v8di)(__m512i)(A), \
1208 (__m128i)__builtin_ia32_extracti64x2_512_mask((__v8di)(__m512i)(A), \
1214 (__m128i)__builtin_ia32_extracti64x2_512_mask((__v8di)(__m512i)(A), \
1277 (__m512i)__builtin_ia32_inserti64x2_512_mask((__v8di)(__m512i)(A), \
1280 (__v8di)_mm512_setzero_si512(), \
1284 (__m512i)__builtin_ia32_inserti64x2_512_mask((__v8di)(__m512i)(A), \
1287 (__v8di)(__m512i)(W), \
1291 (__m512i)__builtin_ia32_inserti64x2_512_mask((__v8di)(__m512i)(A), \
1294 (__v8di)_mm512_setzero_si512(), \