114   return (__m256) __builtin_ia32_andnps256_mask ((__v8sf) __A,  in _mm256_mask_andnot_ps()
115              (__v8sf) __B,  in _mm256_mask_andnot_ps()
116              (__v8sf) __W,  in _mm256_mask_andnot_ps()
122   return (__m256) __builtin_ia32_andnps256_mask ((__v8sf) __A,  in _mm256_maskz_andnot_ps()
123              (__v8sf) __B,  in _mm256_maskz_andnot_ps()
124              (__v8sf)  in _mm256_maskz_andnot_ps()
182   return (__m256) __builtin_ia32_andps256_mask ((__v8sf) __A,  in _mm256_mask_and_ps()
183             (__v8sf) __B,  in _mm256_mask_and_ps()
184             (__v8sf) __W,  in _mm256_mask_and_ps()
190   return (__m256) __builtin_ia32_andps256_mask ((__v8sf) __A,  in _mm256_maskz_and_ps()
191             (__v8sf) __B,  in _mm256_maskz_and_ps()
192             (__v8sf)  in _mm256_maskz_and_ps()
251   return (__m256) __builtin_ia32_xorps256_mask ((__v8sf) __A,  in _mm256_mask_xor_ps()
252             (__v8sf) __B,  in _mm256_mask_xor_ps()
253             (__v8sf) __W,  in _mm256_mask_xor_ps()
259   return (__m256) __builtin_ia32_xorps256_mask ((__v8sf) __A,  in _mm256_maskz_xor_ps()
260             (__v8sf) __B,  in _mm256_maskz_xor_ps()
261             (__v8sf)  in _mm256_maskz_xor_ps()
319   return (__m256) __builtin_ia32_orps256_mask ((__v8sf) __A,  in _mm256_mask_or_ps()
320                  (__v8sf) __B,  in _mm256_mask_or_ps()
321                  (__v8sf) __W,  in _mm256_mask_or_ps()
327   return (__m256) __builtin_ia32_orps256_mask ((__v8sf) __A,  in _mm256_maskz_or_ps()
328                  (__v8sf) __B,  in _mm256_maskz_or_ps()
329                  (__v8sf)  in _mm256_maskz_or_ps()
909   (__m256)__builtin_ia32_rangeps256_mask((__v8sf)(__m256)(A), \
910                                          (__v8sf)(__m256)(B), (int)(C), \
911                                          (__v8sf)_mm256_setzero_ps(), \
915   (__m256)__builtin_ia32_rangeps256_mask((__v8sf)(__m256)(A), \
916                                          (__v8sf)(__m256)(B), (int)(C), \
917                                          (__v8sf)(__m256)(W), (__mmask8)(U)); })
920   (__m256)__builtin_ia32_rangeps256_mask((__v8sf)(__m256)(A), \
921                                          (__v8sf)(__m256)(B), (int)(C), \
922                                          (__v8sf)_mm256_setzero_ps(), \
971   (__m256)__builtin_ia32_reduceps256_mask((__v8sf)(__m256)(A), (int)(B), \
972                                           (__v8sf)_mm256_setzero_ps(), \
976   (__m256)__builtin_ia32_reduceps256_mask((__v8sf)(__m256)(A), (int)(B), \
977                                           (__v8sf)(__m256)(W), \
981   (__m256)__builtin_ia32_reduceps256_mask((__v8sf)(__m256)(A), (int)(B), \
982                                           (__v8sf)_mm256_setzero_ps(), \
1037                 (__v8sf)_mm256_undefined_ps(),  in _mm256_broadcast_f32x2()
1045                 (__v8sf) __O,  in _mm256_mask_broadcast_f32x2()
1053                 (__v8sf) _mm256_setzero_ps (),  in _mm256_maskz_broadcast_f32x2()
1256   (__mmask8)__builtin_ia32_fpclassps256_mask((__v8sf)(__m256)(A), (int)(imm), \
1260   (__mmask8)__builtin_ia32_fpclassps256_mask((__v8sf)(__m256)(A), (int)(imm), \